18483010. READ IN MULTI-TIER NON-VOLATILE MEMORY (Western Digital Technologies, Inc.)
READ IN MULTI-TIER NON-VOLATILE MEMORY
Organization Name
Western Digital Technologies, Inc.
Inventor(s)
Binoy Jose Panakkal of Kochi IN
READ IN MULTI-TIER NON-VOLATILE MEMORY
This abstract first appeared for US patent application 18483010 titled 'READ IN MULTI-TIER NON-VOLATILE MEMORY
Original Abstract Submitted
Technology for reading memory cells in three-dimensional memory having multiple tiers. The memory system erases the tiers within each block independently. Then, memory cells in the tiers are programmed by units such as word lines. The memory system determines one or more read parameters for the selected tier based on the programmed/erased states of the other tiers in the block. For example, the memory system may select read reference levels for the selected tier based on the programmed/erased states of the other tiers. In an aspect, the one or more read parameters are used to determine the set of reference voltages for a bit error rate estimation scan (BES).