18421741. MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES simplified abstract (Micron Technology, Inc.)

MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES

Organization Name

Micron Technology, Inc.

Inventor(s)

Ferdinando Bedeschi of Biassono (MB) (IT)

Stefan Frederik Schippers of Peschiera del Garda (VR) (IT)

MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18421741 titled 'MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES

Simplified Explanation

The patent application describes methods, systems, and devices for a memory device with multiplexed digit lines. Memory cells in the device have a storage component and a selection component with two transistors to selectively couple the memory cell with a digit line.

• The memory device includes memory cells with a storage component and a selection component.
• The selection component consists of two transistors that help connect the memory cell with a digit line.
• A digit line multiplexing component supports a sense component common to a set of digit lines.
• During a read operation, the sense component is coupled with the digit line of the set, while the other digit lines are isolated.

Key Features and Innovation

• Memory cells with a storage component and a selection component.
• Two transistors in the selection component for coupling with digit lines.
• Digit line multiplexing component supporting a common sense component.
• Isolation of digit lines during read operations.

Potential Applications

• Memory devices in electronic devices.
• Data storage systems.
• Integrated circuits.

Problems Solved

• Efficient memory cell selection.
• Reduction of interference between digit lines.
• Improved read operation performance.

Benefits

• Enhanced memory device functionality.
• Increased data storage efficiency.
• Improved data retrieval speed.

Commercial Applications

Memory devices with multiplexed digit lines can be used in various electronic devices, data storage systems, and integrated circuits. The technology offers improved memory cell selection, reduced interference, and enhanced read operation performance, making it valuable for industries requiring efficient data storage and retrieval solutions.

Questions about Memory Devices with Multiplexed Digit Lines

How do memory cells in the device function?

Memory cells in the device consist of a storage component and a selection component with two transistors for coupling with digit lines.

What are the potential applications of memory devices with multiplexed digit lines?

Potential applications include electronic devices, data storage systems, and integrated circuits, where efficient memory cell selection and improved read operation performance are essential.

Original Abstract Submitted

Methods, systems, and devices for a memory device with multiplexed digit lines are described. In some cases, a memory cell of the memory device may include a storage component and a selection component that includes two transistors. A first transistor may be coupled with a word line and a second transistor may be coupled with a select line to selectively couple the memory cell with a digit line. The selection component, in conjunction with a digit line multiplexing component, may support a sense component common to a set of digit lines. In some cases, the digit line of the set may be coupled with the sense component during a read operation, while the remaining digit lines of the set are isolated from the sense component.