18396711. RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING simplified abstract (MEDIATEK INC.)
RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING
Organization Name
Inventor(s)
Jen-Wei Lee of Hsinchu City (TW)
Yi-Ying Liao of Hsinchu City (TW)
Te-Wei Chen of Hsinchu City (TW)
Kun-Yu Wang of Hsinchu City (TW)
Sheng-Tai Tseng of Hsinchu City (TW)
Ronald Kuo-Hua Ho of Hsinchu City (TW)
Bo-Jiun Hsu of Hsinchu City (TW)
Wei-Hsien Lin of Hsinchu City (TW)
Chun-Chih Yang of Hsinchu City (TW)
Chih-Wei Ko of Hsinchu City (TW)
Tai-Lai Tung of Hsinchu City (TW)
RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18396711 titled 'RECTILINEAR-BLOCK PLACEMENT METHOD FOR EARLY FLOORPLAN USING REINFORCEMENT LEARNING
Simplified Explanation:
This patent application describes a method for placing flexible blocks on a chip canvas by first positioning a sub-block, generating an edge-depth map, predicting positions of other sub-blocks using a machine learning model, and then placing those sub-blocks accordingly.
- Key Features and Innovation:
- Placement method for flexible blocks on a chip canvas. - Utilizes machine learning model to predict positions of sub-blocks. - Improves efficiency and accuracy of block placement on layout area.
Potential Applications: This technology can be applied in the semiconductor industry for designing and manufacturing integrated circuits, as well as in other fields requiring precise block placement on a canvas.
Problems Solved: - Enhances the efficiency of block placement on a chip canvas. - Improves the accuracy of positioning flexible blocks in a layout area.
Benefits: - Increased efficiency in chip design and manufacturing processes. - Enhanced accuracy in block placement for better overall performance of integrated circuits.
Commercial Applications: Potential commercial applications include semiconductor companies, electronics manufacturers, and any industry requiring precise block placement in a layout area.
Prior Art: Readers can explore prior research in the field of block placement algorithms and machine learning models for chip design to understand the evolution of this technology.
Frequently Updated Research: Stay updated on advancements in machine learning algorithms for block placement and optimization techniques in chip design for the latest developments in this field.
Questions about Block Placement Technology: 1. How does this technology improve the efficiency of block placement on a chip canvas? 2. What are the potential applications of this method in the semiconductor industry?
Original Abstract Submitted
A rectilinear-block placement method includes disposing a first sub-block of each flexible block on a layout area of a chip canvas according to a reference position, generating an edge-depth map relative to first sub-blocks of flexible blocks on the layout area, predicting positions of second sub-blocks of the flexible blocks with depth values on the edge-depth map by a machine learning model, and positioning the second sub-blocks on the layout area according to the predicted positions of the second sub-blocks of the flexible blocks.
- MEDIATEK INC.
- Jen-Wei Lee of Hsinchu City (TW)
- Yi-Ying Liao of Hsinchu City (TW)
- Te-Wei Chen of Hsinchu City (TW)
- Kun-Yu Wang of Hsinchu City (TW)
- Sheng-Tai Tseng of Hsinchu City (TW)
- Ronald Kuo-Hua Ho of Hsinchu City (TW)
- Bo-Jiun Hsu of Hsinchu City (TW)
- Wei-Hsien Lin of Hsinchu City (TW)
- Chun-Chih Yang of Hsinchu City (TW)
- Chih-Wei Ko of Hsinchu City (TW)
- Tai-Lai Tung of Hsinchu City (TW)
- G06F30/392
- CPC G06F30/392