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18385435. INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF (Taiwan Semiconductor Manufacturing Company, Ltd.)

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INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Han-Tang Hung of Hsinchu TW

Tsu-Chun Kuo of Hsinchu TW

Shin-Yi Yang of Hsinchu TW

INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF

This abstract first appeared for US patent application 18385435 titled 'INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF

Original Abstract Submitted

An interconnection structure includes a first dielectric layer, a second dielectric layer, a first conductive feature, and a second conductive feature. The second dielectric layer is disposed on one side of the first dielectric layer. The first conductive feature is embedded in the first dielectric layer or the second dielectric layer, the second conductive feature is embedded in the first dielectric layer or the second dielectric layer, wherein the first The conductive feature includes a first conductive material, the second conductive feature includes a second conductive material and a barrier layer, the first conductive material is different from the second conductive material. The first conductive material does not contain copper, and the second conductive material contains copper.

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