18382447. HARDMASK INTEGRATION FOR HIGH ASPECT RATIO APPLICATIONS (Tokyo Electron Limited)
HARDMASK INTEGRATION FOR HIGH ASPECT RATIO APPLICATIONS
Organization Name
Inventor(s)
Joshua Baillargeon of Albany NY US
Jinying Lin of Watervliet NY US
HARDMASK INTEGRATION FOR HIGH ASPECT RATIO APPLICATIONS
This abstract first appeared for US patent application 18382447 titled 'HARDMASK INTEGRATION FOR HIGH ASPECT RATIO APPLICATIONS
Original Abstract Submitted
A method for fabricating semiconductor devices is disclosed. The method includes forming a stack over a substrate. The method includes forming a hardmask layer over the stack, the hardmask layer comprising a first tungsten containing sub-layer, and at least one compressive sub-layer and at least one tensile sub-layer. The method includes forming a patternable layer over the hardmask layer. The method includes etching the hardmask layer according to the patternable layer.