18320138. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18320138 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes:
- Package substrate
- First chip structure mounted on the package substrate
- First semiconductor chip mounted on the first chip structure
- First molding layer surrounding the first chip structure and the first semiconductor chip on the package substrate
The first chip structure consists of:
- Second semiconductor chip
- Second molding layer on a lateral surface of the second semiconductor chip
- First redistribution layer on the second semiconductor chip and the second molding layer
- First through electrode on a side of the second semiconductor chip connected to the first redistribution layer
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- Potential Applications
This technology can be applied in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.
- Problems Solved
- Improved packaging and protection of semiconductor chips
- Enhanced connectivity and performance of electronic devices
- Benefits
- Increased reliability and durability of semiconductor packages
- Better electrical connections leading to improved device performance
- Compact design for smaller electronic devices
Original Abstract Submitted
A semiconductor package includes a package substrate, a first chip structure mounted on the package substrate, a first semiconductor chip mounted on the first chip structure, and a first molding layer that surrounds the first chip structure and the first semiconductor chip on the package substrate. The first chip structure includes a second semiconductor chip, a second molding layer on a lateral surface of the second semiconductor chip, a first redistribution layer on the second semiconductor chip and the second molding layer, and a first through electrode on a side of the second semiconductor chip and connected to the first redistribution layer.
