18217544. SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING (Intel Corporation)
SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING
Organization Name
Inventor(s)
Michael Espig of Newberg OR (US)
Menachem Adelman of Modi'in (IL)
Jonathan Combs of Austin TX (US)
Amit Gradstein of Binyamina (IL)
Christopher J. Hughes of Santa Clara CA (US)
Vivekananthan Sanjeepan of Portland OR (US)
Wing Shek Wong of Austin TX (US)
SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING
This abstract first appeared for US patent application 18217544 titled 'SUPPORT FOR LESS THAN 512-BIT OPERAND PROCESSING
Original Abstract Submitted
Techniques for providing 512-bit operands or smaller are described. In some examples, a prefix of an instruction is utilized to define the operand (vector) length. For example, an instruction is to at least include fields for a prefix, an opcode, and operand addressing information, wherein the prefix and addressing information are to be used by decoder circuitry to determine support for a particular a vector length for one or more operands of the instance of the single instruction and the opcode is to indicate one or more operations to perform on the one or more operands.
