18215951. SCHEDULED-BASED LOW-LATENCY DETECTION FOR DESYNCHRONIZATION ATTACKS (Intel Corporation)
SCHEDULED-BASED LOW-LATENCY DETECTION FOR DESYNCHRONIZATION ATTACKS
Organization Name
Inventor(s)
Christopher Gutierrez of HILLSBORO OR (US)
Marcio Juliato of Portland OR (US)
Manoj Sastry of Portland OR (US)
Shabbir Ahmed of HILLSBORO OR (US)
SCHEDULED-BASED LOW-LATENCY DETECTION FOR DESYNCHRONIZATION ATTACKS
This abstract first appeared for US patent application 18215951 titled 'SCHEDULED-BASED LOW-LATENCY DETECTION FOR DESYNCHRONIZATION ATTACKS
Original Abstract Submitted
Techniques include a method, apparatus, system and computer-readable medium to detect, quantify and localize attacks to enhance security for time-synchronized networking. Embodiments include a diagnostic stream producer to produce diagnostic information providing evidence of a timing attack on a node of a time-synchronized network. Embodiments include a diagnostic stream consumer to consume diagnostic information, analyze the diagnostic information, and determine whether a node is under a timing attack. Other embodiments are described and claimed.