18081837. NEUROMORPHIC SYSTEM AND OPERATING METHOD THEREOF simplified abstract (Samsung Electronics Co., Ltd.)

NEUROMORPHIC SYSTEM AND OPERATING METHOD THEREOF

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Jae-Joon Kim of Pohang-si (KR)

Jinseok Kim of Incheon (KR)

Taesu Kim of Incheon (KR)

NEUROMORPHIC SYSTEM AND OPERATING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18081837 titled 'NEUROMORPHIC SYSTEM AND OPERATING METHOD THEREOF

Simplified Explanation

A neuromorphic system is described in this patent application. The system includes an address translation device and multiple synapse memories.

• The address translation device translates the address of each synaptic weight between presynaptic and postsynaptic neurons to generate a translation address.
• The synapse memories store the synaptic weights based on the translation address.
• The translation address is designed in a way that synaptic weights corresponding to each postsynaptic neuron are stored in different synapse memories.
• Similarly, synaptic weights corresponding to each presynaptic neuron are also stored in different synapse memories.

Potential applications of this technology:

• Artificial intelligence and machine learning systems
• Brain-inspired computing
• Neuromorphic hardware and software development

Problems solved by this technology:

• Efficient storage and retrieval of synaptic weights in neuromorphic systems
• Addressing the challenge of storing multiple synaptic weights for each neuron
• Optimizing the performance and functionality of neuromorphic systems

Benefits of this technology:

• Improved efficiency in storing and accessing synaptic weights
• Enhanced performance and accuracy of neuromorphic systems
• Enables more complex and sophisticated neural network models

Original Abstract Submitted

A neuromorphic system includes an address translation device that translates an address corresponding to each of synaptic weights between presynaptic neurons and postsynaptic neurons to generate a translation address, and a plurality of synapse memories that store the synaptic weights based on the translation address. The translation address is generated such that at least two of synaptic weights corresponding to each of the postsynaptic neurons are stored in different synapse memories of the plurality of synapse memories and such that at least two of synaptic weights corresponding to each of the presynaptic neurons are stored in different synapse memories.