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18069996. SOLDER-SHIELDED CHIP BONDING simplified abstract (International Business Machines Corporation)

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SOLDER-SHIELDED CHIP BONDING

Organization Name

International Business Machines Corporation

Inventor(s)

Baleegh Abdo of Fishkill NY (US)

Jae-Woong Nah of Closter NJ (US)

SOLDER-SHIELDED CHIP BONDING - A simplified explanation of the abstract

This abstract first appeared for US patent application 18069996 titled 'SOLDER-SHIELDED CHIP BONDING

Simplified Explanation:

The patent application describes a structure involving two devices bonded together using solder, with superconducting lines on each device connected through the solder shield material.

  • The structure includes a first device with a first chip and a second chip.
  • The second chip has bumps on one side and superconducting lines on the other.
  • A solder bonded layer attaches the first chip to the second chip.
  • A second device with pads facing the bumps on the second chip is connected using solder.
  • The solder shield material surrounds the bumps and pads, connecting the superconducting lines on both devices.

Key Features and Innovation:

  • Use of solder to bond two chips with superconducting lines.
  • Solder shield material to connect superconducting lines on separate devices.
  • Efficient and reliable connection between superconducting lines.

Potential Applications:

  • High-speed computing systems.
  • Quantum computing devices.
  • Superconducting electronics.

Problems Solved:

  • Ensures secure connection between superconducting lines.
  • Facilitates efficient data transfer in high-performance devices.

Benefits:

  • Improved reliability in superconducting systems.
  • Enhanced performance in high-speed computing applications.
  • Simplified manufacturing process for complex electronic structures.

Commercial Applications:

Superconducting devices for data centers and high-performance computing applications.

Questions about Superconducting Lines:

1. How do superconducting lines improve the performance of electronic devices?

  - Superconducting lines reduce energy loss and enable faster data transfer due to their zero resistance properties.

2. What are the challenges in integrating superconducting lines in electronic structures?

  - Challenges include maintaining the superconducting state at low temperatures and ensuring reliable connections between superconducting components.


Original Abstract Submitted

A structure includes a first device having a first chip and a second chip. The second chip has a first side with a plurality of bumps and a second side with a plurality of first superconducting lines. A solder bonded layer attaches the first chip to the second chip. A second device has a first side with a plurality of pads facing the plurality of bumps in the second chip and a second side opposite the first side having a plurality of second superconducting lines. A solder shield material surrounds the plurality of bumps and the plurality of pads, and the plurality of bumps on the second chip are bonded to the plurality of pads on the second device. The solder shield material is connected to the plurality of first superconducting lines of the first device and to the plurality of second superconducting lines of the second device.

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