17895696. ADDRESS TRANSLATION METADATA COMPRESSION IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)

ADDRESS TRANSLATION METADATA COMPRESSION IN MEMORY DEVICES

Organization Name

Micron Technology, Inc.

Inventor(s)

Brian Toronyi of Boulder CO (US)

Scheheresade Virani of Frisco TX (US)

ADDRESS TRANSLATION METADATA COMPRESSION IN MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17895696 titled 'ADDRESS TRANSLATION METADATA COMPRESSION IN MEMORY DEVICES

Simplified Explanation

The abstract describes a memory sub-system that includes a memory device and a processing device. The processing device is able to receive memory access requests, produce a truncated logical address, identify an address translation table entry, and perform memory access operations using physical addresses specified by the table entry.

• Memory sub-system with memory device and processing device
• Processing device receives memory access requests
• Produces truncated logical address using mathematical transformation
• Identifies address translation table entry
• Performs memory access operations using physical address from table entry

Potential Applications

• Computer systems
• Embedded systems
• Mobile devices

Problems Solved

• Efficient memory access
• Address translation
• Improved system performance

Benefits

• Faster memory access
• Reduced latency
• Improved overall system efficiency

Original Abstract Submitted

An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to receive a memory access request specifying a logical address of a data item and a memory access operation to be performed with respect to the data item; produce a truncated logical address by applying a predefined mathematical transformation to the specified logical address; identifying, in an address translation table, an address translation table entry identified by the truncated logical address; and perform the memory access operation using a physical address specified by the address translation table entry.