UNIPOLAR-FET IMPLEMENTATION IN STACKED-FET CMOS

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

SHOGO Mochizuki of Mechanicville NY (US)

UNIPOLAR-FET IMPLEMENTATION IN STACKED-FET CMOS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17643014 titled 'UNIPOLAR-FET IMPLEMENTATION IN STACKED-FET CMOS

Simplified Explanation

The patent application describes a system that includes a semiconductor structure called a stacked field effect transistor (stacked-FET). The stacked-FET consists of a top FET with multiple nano-sheets in contact with corresponding nano-sheets in a corresponding top channel for an active gate. The stacked-FET also includes multiple bottom channels with a dielectric material. The semiconductor structure also includes an active gate made up of the corresponding top channels and corresponding bottom channels with the dielectric material.

The system includes a semiconductor structure called a stacked field effect transistor (stacked-FET).
The stacked-FET has a top FET with multiple nano-sheets in contact with corresponding nano-sheets in a corresponding top channel for an active gate.
The stacked-FET also has multiple bottom channels with a dielectric material.
The semiconductor structure includes an active gate made up of the corresponding top channels and corresponding bottom channels with the dielectric material.

Potential Applications

This technology could be used in the development of more efficient and powerful semiconductor devices.
It may find applications in the fields of electronics, telecommunications, and computing.

Problems Solved

The stacked-FET design allows for improved performance and functionality of semiconductor devices.
It addresses the need for more advanced and efficient transistor structures.

Benefits

The use of multiple nano-sheets in the top FET and dielectric material in the bottom channels enhances the performance of the semiconductor structure.
The active gate design improves the overall functionality and efficiency of the system.
This technology has the potential to enable the development of more advanced and powerful electronic devices.

Original Abstract Submitted

Embodiments are disclosed for a system. The system includes a semiconductor structure. The semiconductor structure includes a stacked field effect transistor (stacked-FET). The stacked-FET includes a top FET having multiple top channels having multiple nano-sheets in contact with corresponding nano-sheets in a corresponding top channels for an active gate. The stacked-FET includes multiple bottom channels having a dielectric material. The semiconductor structure also includes an active gate. The active gate includes the corresponding top channels and corresponding bottom channels having the dielectric material.