US Patent Application 18446507. METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE simplified abstract

METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE

Organization Name

CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor(s)

Xiaoling Wang of Hefei (CN)

Hai-Han Hung of Hefei (CN)

Min-Hui Chang of Hefei (CN)

METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18446507 titled 'METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE

Simplified Explanation

The patent application describes a method for forming a capacitor. Here are the key points:

• The method involves several steps to create the capacitor.
• A base is provided as the starting point.
• Layers called supporting layers and sacrificial layers are sequentially formed on the base.
• Through holes are created in the supporting and sacrificial layers to expose the base.
• These through holes are then filled to create filling structures.
• Another supporting layer is formed to cover the remaining sacrificial layer and filling structures.
• Through holes are created in this second supporting layer.
• A second sacrificial layer and a third supporting layer are formed, covering the second supporting layer and through holes.
• Through holes are created in the third supporting layer and second sacrificial layer.
• The filling structures created earlier are removed to connect the through holes in the third supporting layer with the corresponding ones in the first supporting layer.
• Finally, electrode layers, a dielectric layer, and a second electrode layer are sequentially formed to complete the capacitor.

Original Abstract Submitted

Method for forming a capacitor includes following operations. A base is provided. First supporting layer and first sacrificial layer are formed on the base sequentially. First through holes penetrating first supporting layer and first sacrificial layer are formed to expose the base. First through holes are filled to form first filling structures. Second supporting layer covering remaining first sacrificial layer and first filling structures is formed. Second through holes penetrating second supporting layer are formed. Second sacrificial layer covering remaining second supporting layer and second through holes, and third supporting layer are formed. Third through holes penetrating third supporting layer and second sacrificial layer are formed. First filling structures are removed to communicate each of third through holes and corresponding one of first through holes. First electrode layers, dielectric layer and second electrode layer covering first through holes and third through holes are formed sequentially to form the capacitor.