US Patent Application 18331746. APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS simplified abstract

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APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS

Organization Name

Micron Technology, Inc.

Inventor(s)

Perry V. Lea of Eagle ID (US)

Timothy P. Finkbeiner of Boise ID (US)

APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18331746 titled 'APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS

Simplified Explanation

The abstract describes an invention related to in-memory operations using a PIM (Processing-in-Memory) capable device. The device includes an array of memory cells and sensing circuitry, which includes a sense amplifier and a compute component. The device also includes timing circuitry and a sequencer to control the timing and coordination of compute operations. The sequencer receives command instructions from an external source to initiate compute operations.

  • The invention is related to in-memory operations using a PIM capable device.
  • The device includes an array of memory cells and sensing circuitry.
  • The sensing circuitry includes a sense amplifier and a compute component.
  • Timing circuitry is included to control the timing of operations performed using the sensing circuitry.
  • A sequencer is included to coordinate compute operations.
  • The sequencer receives command instructions from an external source to initiate compute operations.

Potential applications of this technology include:

  • Accelerating data-intensive operations by performing computations directly in memory.
  • Improving the efficiency of machine learning algorithms by reducing data movement between memory and processing units.
  • Enhancing the performance of database systems by enabling in-memory query processing.
  • Enabling real-time analytics by processing data directly in memory.
  • Facilitating high-performance computing by reducing the latency associated with data access and computation.


Original Abstract Submitted

Apparatuses and methods are provided for in-memory operations. An example apparatus includes a PIM capable device having an array of memory cells and sensing circuitry coupled to the array, where the sensing circuitry includes a sense amplifier and a compute component. The PIM capable device includes timing circuitry selectably coupled to the sensing circuitry. The timing circuitry is configured to control timing of performance of operations performed using the sensing circuitry. The PIM capable device also includes a sequencer selectably coupled to the timing circuitry. The sequencer is configured to coordinate compute operations. The apparatus also includes a source external to the PIM capable device. The sequencer is configured to receive a command instruction set from the source to initiate performance of a compute operation.