US Patent Application 18093779. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE simplified abstract

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

Organization Name

CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor(s)

Xiaojie Li of HEFEI (CN)

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18093779 titled 'SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

Simplified Explanation

The patent application describes a semiconductor structure and a method for forming the structure.

• The method involves forming a stacking layer on a substrate, which includes multiple semiconductor layers arranged at intervals in one direction.
• The stacking layer also includes specific regions for transistors, capacitors, and bit lines.
• The semiconductor layers consist of semiconductor columns arranged at intervals in another direction.
• A capacitor is formed in the capacitor region, extending in a different direction.
• A word line is formed in the transistor region, covering the semiconductor columns and extending in the same direction as the columns.
• A bit line is formed in the bit line region, extending in the same direction as the stacking layer.

Original Abstract Submitted

This invention relates to a semiconductor structure and a method for forming the semiconductor structure. The method for forming a semiconductor structure includes the following steps: forming a stacking layer on a top surface of a substrate, where the stacking layer includes a plurality of semiconductor layers arranged at intervals in a first direction, and the stacking layer includes a transistor region, a capacitor region, and a bit line region, where the semiconductor layers include semiconductor columns arranged at intervals in a third direction; forming, in the capacitor region, a capacitor extending in the second direction; forming a word line in the transistor region, where the word line extends in the third direction and continuously covers the semiconductor columns arranged at intervals in the third direction; and forming a bit line in the bit line region, where the bit line extends in the first direction.