US Patent Application 17983469. NON-VOLATILE MEMORY DEVICE simplified abstract

From WikiPatents
Jump to navigation Jump to search

NON-VOLATILE MEMORY DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.==Inventor(s)==

[[Category:Changhun Kim of Suwon-si (KR)]]

[[Category:Jaeick Son of Suwon-si (KR)]]

NON-VOLATILE MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17983469 titled 'NON-VOLATILE MEMORY DEVICE

Simplified Explanation

The patent application describes a non-volatile memory device with a stacked chip design.

  • The device includes a first chip with a substrate and a circuit element.
  • A second chip is stacked on top of the first chip and has a substrate with two cell regions.
  • Gate electrodes are stacked on one of the cell regions between the second substrate and the first chip.
  • An upper insulating layer covers the second substrate and has dummy pads and input/output pads.
  • A cover layer on top of the upper insulating layer exposes the input/output pads to the outside.
  • Dummy contact plugs on one side of the second substrate penetrate the upper insulating layer and connect the dummy pads and the circuit element.


Original Abstract Submitted

A non-volatile memory device includes a first chip including a first substrate and a circuit element, and a second chip stacked on the first chip. The second chip includes a second substrate including a first cell region and a second cell region, gate electrodes stacked on the second cell region of the second substrate, wherein the gate electrodes are between the second substrate and the first chip, an upper insulating layer configured to cover the second substrate, dummy pads and input/output pads on the upper insulating layer, a cover layer on the upper insulating layer to cover the dummy pads, wherein the cover layer is configured to expose the input/output pads to an outside, and dummy contact plugs on one side of the second substrate, wherein the dummy contact plugs are configured to penetrate the upper insulating layer and electrically connect the dummy pads and the circuit element.