US Patent Application 17827582. APPARATUSES AND METHODS FOR ARRANGING READ DATA FOR OUTPUT simplified abstract

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APPARATUSES AND METHODS FOR ARRANGING READ DATA FOR OUTPUT

Organization Name

Micron Technology, Inc.

Inventor(s)

Ryo Fujimaki of Sagamihara (JP)

APPARATUSES AND METHODS FOR ARRANGING READ DATA FOR OUTPUT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17827582 titled 'APPARATUSES AND METHODS FOR ARRANGING READ DATA FOR OUTPUT

Simplified Explanation

- The patent application describes apparatuses and methods for arranging read data for output. - The apparatus includes a clock circuit, a data output circuit, and a control circuit. - The clock circuit generates multiphase clock signals with different phases based on a clock signal. - The data output circuit receives multiple read data bits and outputs them serially in sync with the multiphase clock signals. - The control circuit determines the correspondences between the read data bits and the multiphase clock signals based on information about which clock signal captures the read command.

  • The invention aims to improve the arrangement of read data for output.
  • It utilizes multiphase clock signals to synchronize the output of read data bits.
  • The use of different phases in the clock signals helps in organizing the read data bits.
  • The control circuit determines the appropriate correspondence between the read data bits and the clock signals.
  • This invention can enhance the efficiency and accuracy of data output in various applications.


Original Abstract Submitted

Apparatuses and methods for arranging read data for output are described. An example apparatus includes a clock circuit, a data output circuit, and a control circuit. The clock circuit is configured to provide multiphase clock signals having different phases from each other based on a clock signal. The data output circuit is configured to receive a plurality of read data bits responsive to a read command and serially output each of the plurality of read data bits in synchronism with a corresponding one of the multiphase clock signals. The control circuit is configured to determine the correspondences between the plurality of read data bits and the multiphase clock signals based on information about which of the multiphase clock signals captures the read command.

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