Difference between revisions of "Semiconductor Energy Laboratory Co., Ltd. patent applications published on November 30th, 2023"

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'''Summary of the patent applications from Semiconductor Energy Laboratory Co., Ltd. on November 30th, 2023'''
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Semiconductor Energy Laboratory Co., Ltd. has recently filed several patents related to various semiconductor devices and materials. These patents aim to improve the performance, reliability, and functionality of these devices.
 +
 +
Summary:
 +
 +
The organization has filed patents for:
 +
* A ferroelectric device with improved ferroelectricity, utilizing specific insulators to control the presence and movement of hydrogen within the device.
 +
* A semiconductor device with a large storage capacity per unit area, offering high storage density without compromising performance.
 +
* A new design for a separator in a nonaqueous secondary battery, utilizing different pore sizes in the separators to enhance battery performance.
 +
* A positive electrode active material and a secondary battery that are stable in high potential and high temperature conditions, ensuring safety.
 +
* A new structure for a semiconductor device, including transistors with specific configurations and connections.
 +
* A method for manufacturing a highly reliable semiconductor device with stable electric characteristics, involving the use of an oxide semiconductor layer.
 +
* A novel composite oxide semiconductor material with potential applications in electronics and optoelectronics.
 +
* An imaging device that can process images and convert them into binary data using a product-sum operation with a weight coefficient.
 +
* A semiconductor device that aims to reduce parasitic capacitance between wirings, utilizing specific oxide insulating layers.
 +
* A semiconductor device with a transistor that uses an oxide semiconductor, making it more convenient and reliable for various applications.
 +
 +
Notable applications:
 +
* Improved ferroelectric devices with controlled hydrogen presence and movement.
 +
* Semiconductor devices with large storage capacity per unit area.
 +
* Enhanced nonaqueous secondary batteries with optimized separator design.
 +
* Stable positive electrode active materials and secondary batteries for high potential and high temperature conditions.
 +
* Innovative semiconductor device structures and manufacturing methods for improved reliability and performance.
 +
* Novel composite oxide semiconductor materials for various electronic and optoelectronic applications.
 +
* Efficient imaging devices for image processing and recognition.
 +
* Reduced parasitic capacitance in semiconductor devices for improved performance.
 +
* Convenient and reliable semiconductor devices using oxide semiconductors.
 +
 +
 +
 +
 
==Patent applications for Semiconductor Energy Laboratory Co., Ltd. on November 30th, 2023==
 
==Patent applications for Semiconductor Energy Laboratory Co., Ltd. on November 30th, 2023==
  

Revision as of 04:54, 5 December 2023

Summary of the patent applications from Semiconductor Energy Laboratory Co., Ltd. on November 30th, 2023

Semiconductor Energy Laboratory Co., Ltd. has recently filed several patents related to various semiconductor devices and materials. These patents aim to improve the performance, reliability, and functionality of these devices.

Summary:

The organization has filed patents for:

  • A ferroelectric device with improved ferroelectricity, utilizing specific insulators to control the presence and movement of hydrogen within the device.
  • A semiconductor device with a large storage capacity per unit area, offering high storage density without compromising performance.
  • A new design for a separator in a nonaqueous secondary battery, utilizing different pore sizes in the separators to enhance battery performance.
  • A positive electrode active material and a secondary battery that are stable in high potential and high temperature conditions, ensuring safety.
  • A new structure for a semiconductor device, including transistors with specific configurations and connections.
  • A method for manufacturing a highly reliable semiconductor device with stable electric characteristics, involving the use of an oxide semiconductor layer.
  • A novel composite oxide semiconductor material with potential applications in electronics and optoelectronics.
  • An imaging device that can process images and convert them into binary data using a product-sum operation with a weight coefficient.
  • A semiconductor device that aims to reduce parasitic capacitance between wirings, utilizing specific oxide insulating layers.
  • A semiconductor device with a transistor that uses an oxide semiconductor, making it more convenient and reliable for various applications.

Notable applications:

  • Improved ferroelectric devices with controlled hydrogen presence and movement.
  • Semiconductor devices with large storage capacity per unit area.
  • Enhanced nonaqueous secondary batteries with optimized separator design.
  • Stable positive electrode active materials and secondary batteries for high potential and high temperature conditions.
  • Innovative semiconductor device structures and manufacturing methods for improved reliability and performance.
  • Novel composite oxide semiconductor materials for various electronic and optoelectronic applications.
  • Efficient imaging devices for image processing and recognition.
  • Reduced parasitic capacitance in semiconductor devices for improved performance.
  • Convenient and reliable semiconductor devices using oxide semiconductors.



Patent applications for Semiconductor Energy Laboratory Co., Ltd. on November 30th, 2023

LIQUID CRYSTAL DISPLAY DEVICE AND SEMICONDUCTOR DEVICE (18231950)

Main Inventor

Hajime KIMURA


Brief explanation

The patent application describes a method for controlling the gradient of an electric field applied to liquid crystals by increasing the interval between electrodes that drive the liquid crystals.
  • The invention aims to optimize the electric field applied between the electrodes in order to improve the performance of liquid crystal displays.
  • The device includes a first electrode, an insulating film, and a thin film transistor formed over a substrate.
  • The thin film transistor includes a semiconductor film with a source, channel region, and drain.
  • A second electrode, with first opening patterns, is located over the semiconductor film and the first electrode.
  • Liquid crystals are provided over the second electrode.
  • By adjusting the interval between the electrodes, the gradient of the electric field can be controlled, leading to improved display quality.

Abstract

By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.

ELECTRONIC DEVICE (18233641)

Main Inventor

Julian LINDBLAD


Brief explanation

- The patent application describes a new electronic device with a flexible display.

- The device includes organic light emission diodes (OLEDs) and a series of connected columnar bodies. - Users can change the shape of the device to use it as a tablet, eBook, or hand-held gaming device. - The device can resize its main display area based on the selected mode.

Abstract

A novel electronic device including a flexible display is presented. The electronic device has a flexible display including an organic light emission diodes and a plurality of columnar bodies linked together. Users can transform the shape of the electronic device into a tablet, an eBook, or a hand-held gaming device. The electronic device is configured to resize its main display area in accordance with the selected mode.

DISPLAY DEVICE (18296690)

Main Inventor

Takashi NAKAGAWA


Brief explanation

The patent application describes a display device with a narrower frame by stacking multiple layers.
  • The display device consists of three layers: the first layer includes gate and data driver circuits, the second layer includes a demultiplexer circuit, and the third layer includes the display portion.
  • The display portion has pixels arranged in a matrix, with the demultiplexer circuit connected to the data driver circuit and some of the pixels.
  • The gate and data driver circuits overlap with some of the pixels, creating a region where they are not strictly separated from each other.
  • This overlapping design allows for the provision of five or more gate driver circuits and five or more data driver circuits.

Abstract

A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE (18245098)

Main Inventor

Hiromichi GODO


Brief explanation

The patent application describes a semiconductor device that has low power consumption.
  • The device includes two transistors and a capacitor.
  • The first transistor has a first gate and a first back gate, and the second transistor has a second gate and a second back gate.
  • The gate insulating layer of the first back gate has ferroelectricity.
  • The first transistor can retain a first potential corresponding to first data when it is in an off state.
  • The second transistor can allow an output current to flow between its source and drain.

Abstract

A semiconductor device with low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first gate and a first back gate, and the second transistor includes a second gate and a second back gate. A gate insulating layer for the first back gate has ferroelectricity. The first transistor has a function of, when being in an off state, retaining a first potential corresponding to first data. The second transistor has a function of making an output current flow between a source and a drain of the second transistor.

SEMICONDUCTOR DEVICE (18234942)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The patent application describes a semiconductor device consisting of a first transistor, a second transistor, and a capacitor.
  • The second transistor and the capacitor are positioned above the first transistor, overlapping with its gate.
  • The gate of the first transistor is directly connected to the semiconductor layer of the second transistor and the dielectric layer of the capacitor.
  • The second transistor is a vertical transistor, with its channel direction perpendicular to the upper surface of the semiconductor layer of the first transistor.

Abstract

A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are provided over the first transistor so as to overlap with a gate of the first transistor. A semiconductor layer of the second transistor and a dielectric layer of the capacitor are directly connected to the gate of the first transistor. The second transistor is a vertical transistor, where its channel direction is perpendicular to an upper surface of a semiconductor layer of the first transistor.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (18231830)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The abstract describes a new semiconductor device with a transistor that uses an oxide semiconductor, making it more convenient and reliable for various applications.
  • The semiconductor device includes a transistor with a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer on a substrate.
  • An insulating layer is placed over the transistor, and a conductive layer is placed over the insulating layer.
  • The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer.
  • The gate insulating layer and the insulating layer align with each other over the gate electrode layer in the channel width direction of the oxide semiconductor layer.
  • The conductive layer covers the channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer, and is in contact with the gate electrode layer.

Abstract

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

METHOD FOR MANUFACTURING OXIDE SEMICONDUCTOR DEVICE (18231902)

Main Inventor

Shunpei Yamazaki


Brief explanation

The patent application describes a semiconductor device that aims to reduce parasitic capacitance between wirings.
  • The device includes an oxide insulating layer that acts as a protective layer for the channel.
  • The oxide insulating layer is formed over part of an oxide semiconductor layer that overlaps with a gate electrode layer.
  • Additionally, in the same step, another oxide insulating layer is formed to cover the peripheral portion of the oxide semiconductor layer.
  • The purpose of this second oxide insulating layer is to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer.
  • By increasing this distance, the device is able to reduce parasitic capacitance.

Abstract

An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.

IMAGING DEVICE AND ELECTRONIC DEVICE (18231871)

Main Inventor

Takayuki IKEDA


Brief explanation

The patent application describes an imaging device that can process images and convert them into binary data using a product-sum operation with a weight coefficient. This allows for efficient processing of image data in applications such as neural networks and image recognition. 
  • Imaging device capable of image processing
  • Retains analog data obtained from image-capturing operation in pixels
  • Performs product-sum operation with weight coefficient to convert data into binary form
  • Enables processing such as image recognition in neural networks
  • Efficiently retains large volumes of image data in analog form in pixels

Abstract

An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

COMPOSITE OXIDE SEMICONDUCTOR AND TRANSISTOR (18228134)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The abstract describes a novel composite oxide semiconductor material that consists of three regions arranged in a mosaic pattern. 
  • The first region contains indium, while the second region contains an element M (such as Ga, Al, Hf, Y, or Sn).
  • The third region contains zinc oxide.
  • The first region can be either indium oxide or indium zinc oxide, while the second region can be either gallium oxide or gallium zinc oxide.
  • The element M in the second region is specifically gallium.
  • The composite oxide semiconductor material has potential applications in various fields, including electronics and optoelectronics.

Abstract

A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE (18214623)

Main Inventor

Toshinari SASAKI


Brief explanation

The patent application describes a method for manufacturing a highly reliable semiconductor device with stable electric characteristics. The method involves the use of a thin film transistor made of an oxide semiconductor layer. 
  • The objective is to provide a reliable semiconductor device with stable electric characteristics.
  • The method aims to reduce impurities such as moisture in the oxide semiconductor layer.
  • Heat treatment is performed to improve the purity of the oxide semiconductor layer and remove impurities.
  • The heat-treated oxide semiconductor layer is slowly cooled under an oxygen atmosphere.
  • The method helps in achieving a highly reliable semiconductor device at a lower cost and with high productivity.

Abstract

It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

SEMICONDUCTOR DEVICE (18233456)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The patent application describes a new structure for a semiconductor device.
  • The device includes a first transistor with a channel formation region on a substrate containing a semiconductor material.
  • Impurity regions are formed with the channel formation region in between.
  • A first gate insulating layer is placed over the channel formation region, followed by a first gate electrode.
  • The first source electrode and first drain electrode are electrically connected to the impurity region.
  • The device also includes a second transistor with a second gate electrode over the substrate containing a semiconductor material.
  • A second gate insulating layer is placed over the second gate electrode, followed by an oxide semiconductor layer.
  • The second source electrode and second drain electrode are electrically connected to the oxide semiconductor layer.

Abstract

An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

METHOD FOR FORMING POSITIVE ELECTRODE ACTIVE MATERIAL, POSITIVE ELECTRODE, SECONDARY BATTERY, ELECTRONIC DEVICE, POWER STORAGE SYSTEM, AND VEHICLE (18249901)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

This patent application describes a positive electrode active material and a secondary battery that are stable in high potential and high temperature conditions, ensuring safety.
  • The positive electrode consists of two materials, with the second material covering part of the surface of the first material.
  • The first material is a lithium cobalt oxide containing magnesium, fluorine, aluminum, and nickel.
  • The second material is a composite oxide with an olivine crystal structure, containing one or more elements from Fe, Ni, Co, and Mn.
  • The combination of these materials provides stability in high potential and high temperature states.
  • The innovation aims to create a highly safe secondary battery with improved performance and stability.

Abstract

A positive electrode active material that is stable in a high potential state or a high temperature state and a highly safe secondary battery are provided. The positive electrode includes a first material and a second material and includes a region where at least part of a surface of the first material is covered with the second material. The first material includes a lithium cobalt oxide containing magnesium, fluorine, aluminum, and nickel. The second material includes a composite oxide (containing one or more selected from Fe, Ni, Co, and Mn) having an olivine crystal structure.

NONAQUEOUS SECONDARY BATTERY (18228732)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The abstract describes a new design for a separator in a nonaqueous secondary battery.
  • The battery includes a positive electrode, a negative electrode, an electrolyte solution, a first separator, and a second separator.
  • The first and second separators are placed between the positive and negative electrodes.
  • The first separator has a pore of a certain size, while the second separator has a pore of a different size.
  • The volume proportion of the first pores in the first separator is different from the volume proportion of the second pores in the second separator.

Abstract

To provide a novel structure of a separator in a secondary battery. A nonaquesous secondary battery includes a positive electrode, a negative electrode, an electrolyte solution, a first separator, and a second separator. The first separator and the second separator are provided between the positive electrode and the negative electrode. The first separator is provided with a first pore, the second separator is provided with a second pore, and the size of the first pore is different from the size of the second pore. Furthermore, the proportion of the volume of the first pores in the first separator is different from the proportion of the volume of the second pores in the second separator.

Semiconductor Device and Method For Driving Semiconductor Device (18233172)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

A semiconductor device with a large storage capacity per unit area is described in this patent application. 
  • The device offers a high storage capacity in a compact form.
  • It utilizes semiconductor technology for efficient data storage.
  • The storage capacity per unit area is significantly increased compared to existing devices.
  • The device is designed to maximize storage density without compromising performance.
  • It can be used in various applications requiring high storage capacity in limited space.
  • The semiconductor device is expected to provide improved data storage solutions.

Abstract

A semiconductor device with a large storage capacity per unit area is provided.

Ferroelectric Device and Semiconductor Device (18032651)

Main Inventor

Shunpei YAMAZAKI


Brief explanation

The patent application describes a ferroelectric device with improved ferroelectricity.
  • The device consists of a first conductor, a first insulator, a ferroelectric layer, a second conductor, a second insulator, and a third insulator.
  • The second insulator is capable of capturing or fixing hydrogen, while the third insulator inhibits hydrogen diffusion.
  • The purpose of the invention is to enhance the performance of the ferroelectric device by controlling the presence and movement of hydrogen within the device.

Abstract

A ferroelectric device having favorable ferroelectricity is provided. The ferroelectric device includes a first conductor over a first insulator, a ferroelectric layer over the first conductor, a second conductor over the ferroelectric layer, a second insulator over the second conductor, and a third insulator surrounding the first conductor, the ferroelectric layer, the second conductor, and the second insulator. The second insulator has a function of capturing or fixing hydrogen, and the third insulator has a function of inhibiting hydrogen diffusion.