Samsung electronics co., ltd. (20240096420). NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME simplified abstract

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NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME

Organization Name

samsung electronics co., ltd.

Inventor(s)

SUNG-MIN Joe of SEOUL (KR)

NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240096420 titled 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME

Simplified Explanation

The abstract describes a nonvolatile memory device with a memory cell region, a peripheral circuit region, a memory cell array, a voltage generator, a control logic circuit, and a verify circuit.

  • Memory cell region with first metal pad
  • Peripheral circuit region with second metal pad
  • Memory cell array with memory cells, word lines, and bit line
  • Voltage generator supplying supply voltages
  • Control logic circuit programming memory cells
  • Verify circuit controlling verify operation

Potential Applications

This technology can be applied in various electronic devices requiring nonvolatile memory storage, such as smartphones, tablets, digital cameras, and solid-state drives.

Problems Solved

This technology solves the problem of efficiently programming and verifying memory cells in a nonvolatile memory device, ensuring accurate and reliable data storage.

Benefits

The benefits of this technology include improved data storage reliability, faster programming and verification processes, and enhanced overall performance of nonvolatile memory devices.

Potential Commercial Applications

The potential commercial applications of this technology include the production of high-performance nonvolatile memory devices for consumer electronics, industrial equipment, automotive systems, and data storage solutions.

Possible Prior Art

One possible prior art for this technology could be the use of similar programming and verification circuits in existing nonvolatile memory devices, such as NAND flash memory or NOR flash memory.

Unanswered Questions

How does this technology compare to existing nonvolatile memory devices in terms of speed and reliability?

This article does not provide a direct comparison between this technology and existing nonvolatile memory devices in terms of speed and reliability. Further research and testing would be needed to determine the specific advantages and limitations of this technology compared to others.

What are the potential challenges in implementing this technology on a larger scale for mass production?

This article does not address the potential challenges in implementing this technology on a larger scale for mass production. Factors such as manufacturing costs, scalability, and compatibility with existing production processes could pose challenges that need to be explored further.


Original Abstract Submitted

according to an exemplary embodiment of the inventive concept, there is provided a nonvolatile memory device comprising: a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array, in the memory cell region, comprising a plurality of memory cells, a plurality of word lines and a bit line connected to the memory cells, wherein each memory cell is connected to one of the word lines, a voltage generator, in the peripheral circuit region, supplying a plurality of supply voltages to the memory cell array, a control logic circuit, in the peripheral circuit region, programming a selected one of the memory cells connected to a selected one of the word lines into a first program state by controlling the voltage generator, and a verify circuit, in the peripheral circuit region, controlling a verify operation on the memory cell array by controlling the voltage generator, wherein the verify circuit controls a word line voltage applied to at least one unselected word line not to be programmed among the plurality of word lines in the verify operation and a bit line voltage applied to the bit line connected differently from a voltage level of a voltage applied in a read operation of the nonvolatile memory device.