International Business Machines Corporation patent applications on February 29th, 2024
Patent Applications by International Business Machines Corporation on February 29th, 2024
International Business Machines Corporation: 75 patent applications
International Business Machines Corporation has applied for patents in the areas of G06N20/00 (12), H01L29/42392 (8), H01L29/775 (8), H01L23/528 (8), H01L29/417 (7)
With keywords such as: data, computer, device, based, source, region, contact, drain, user, and program in patent application abstracts.
See the following report for International Business Machines Corporation patent applications published on February 29th, 2024:
International Business Machines Corporation patent applications on February 29th, 2024
Patent Applications by International Business Machines Corporation
20240069442.PHOTOACID GENERATOR_simplified_abstract_(international business machines corporation)
Inventor(s): Gerhard Ingmar Meijer of Zuerich (CH) for international business machines corporation, Valery Weber of Gattikon (CH) for international business machines corporation, Peter Willem Jan Staar of Zurich (CH) for international business machines corporation
IPC Code(s): G03F7/26, C07C309/06, C07C309/19, C07C309/30, C07C309/39, C07C311/48, C07D285/16, C07F7/22, C07F9/92, C07F9/94, G03F7/004
Abstract: the present invention relates to a novel photoacid generator compound cation, comprising an element having for 92 ev photons (extreme ultraviolet (euv)) an absorption cross section of at least 0.5�10�cm/mol; having at least two stable oxidation states; and selected from the elements of group 1 to group 15 of the periodic table of the elements. additionally, the present invention relates to a photoacid generator comprising said photoacid generator compound cation and an anion. furthermore, the present invention aims to provide a photoresist composition comprising said photoacid generator and an acid labile polymer. finally, the present invention relates to a method of generating an acid using the photoresist composition and a method of forming a patterned materials feature on a substrate.
Inventor(s): Gandhi SIVAKUMAR of Bentleigh (AU) for international business machines corporation, Kushal S. PATEL of Pune (IN) for international business machines corporation, Sarvesh S. PATEL of Pune (IN) for international business machines corporation, Jianbin TANG of Doncaster East (AU) for international business machines corporation
IPC Code(s): G06F3/04883, G06F40/20
Abstract: provided are a computer program product, system, and method for training and using a sentiment machine learning module to determine a sentiment score. haptic metric values are collected from haptic interfaces embedded in input devices users control to generate content. a training set associates a haptic metric value resulting from a user interacting with an input device to generate content and a sentiment score for the content. a sentiment machine learning module is trained to output the sentiment score in a training set from input comprising the haptic metric value. a haptic metric value received from an input device, used by an active user interacting with the interactive program, is inputted to the sentiment machine learning module to output a haptic sentiment score for the haptic metric value. the haptic sentiment score is provided to an interactive program to control the interactive program communications with the active user.
Inventor(s): Esdras E. Cruz-Aguilar of Round Rock TX (US) for international business machines corporation, Taru Varshney of Gopanpally (IN) for international business machines corporation, Jes Kiran Chittigala of Hyderabad (IN) for international business machines corporation, Ravi A. Shankar of Austin TX (US) for international business machines corporation, Perinkulam I. Ganesh of Round Rock TX (US) for international business machines corporation, Michael S Fuller of Pflugerville TX (US) for international business machines corporation
IPC Code(s): G06F3/06
Abstract: a method, computer system, and computer program product area provided. a computer transmits a query command to a storage descriptor area of a first disk. the first disk belongs to a dual-site data replication system. the dual-site data replication system provides active-active access to a volume of data stored in an active disk and replicated in a backup disk. the computer receives a response to the query command. the response indicates the active disk and the backup disk for the dual-site data replication system. the computer controls an additional copy of the volume of data at a further remote site based on the active disk.
Inventor(s): Deepak Malik of Gurgaon (IN) for international business machines corporation, Sudarshan Sudarshan of Ghaziabad (IN) for international business machines corporation, Anita Duggal of Delhi (IN) for international business machines corporation, Hemant Singh of Gurgaon (IN) for international business machines corporation, Mukundan Sundararajan of Bangalore (IN) for international business machines corporation
IPC Code(s): G06F8/10, G06F8/20
Abstract: in an approach to improve converting conversation to user stories, embodiments capture keywords from a captured discussion, and identify the probability of the keywords being an object attribute or action behavior. further, responsive to identifying, based on the probability, that the keywords are the object attribute or the action behavior, embodiments determine that the object attribute or the action behavior are not new to a first user story. additionally, embodiments determine that the attribute or the action behavior are associated with an existing object in a first user story, and update the first user story with the attribute or the action behavior.
Inventor(s): Julian Timothy DOLBY of Bronx NY (US) for international business machines corporation, Horst Cornelius SAMULOWITZ of Armonk NY (US) for international business machines corporation, Kavitha SRINIVAS of Port Chester NY (US) for international business machines corporation
IPC Code(s): G06F8/35
Abstract: techniques for computer software code analysis are disclosed. one or more data flows are generated, based on analyzing software code using static analysis. a data object is identified in the software code using the one or more data flows, the data object relating to a structured dataset. a correspondence between a code expression in the software code and a characteristic of the structured dataset is identified, based on analyzing one or more reads from and one or more writes to the data object using the one or more data flows. the code expression for the structured dataset is analyzed, based on the correspondence, including at least one of: (i) generating a software code recommendation engine based on the code expression and the structured dataset, or (ii) generating one or more lambda expressions for application to the structured dataset, based on the code expression.
Inventor(s): Jin Shi of Ningbo (CN) for international business machines corporation, Chih-Yuan Lin of Xindian Dist. (TW) for international business machines corporation, Shu-Chih Chen of Banqiao Dist. (TW) for international business machines corporation, Pei-Yi Lin of New Taipei City 234 (TW) for international business machines corporation, Chao Yuan Huang of Taipei (TW) for international business machines corporation
IPC Code(s): G06F8/75, G06F40/216
Abstract: a method for identifying hard-coded strings in source code is disclosed. in one embodiment, such a method parses source code and associated localization resource files to identify hard-coded strings and their associated context. the method provides a confidence score for each hard-coded string that indicates whether the hard-coded string is translatable or non-translatable. based on the confidence score for each hard-coded string, the method transforms each hard-coded string into a single equivalence word. the method then prepares training data by tagging the hard-coded strings in the source code and associated localization resource files as one of translatable and non-translatable. the method then trains a parts-of-speech (pos) tagging model using the training data. at runtime, the method fetches potential hard-coded strings and tags each hard-coded string as one of translatable and non-translatable using the pos tagging model. a corresponding system and computer program product are also disclosed.
Inventor(s): Harish Bharti of Pune (IN) for international business machines corporation, Rajesh Kumar Saxena of Thane East (IN) for international business machines corporation, Sandeep Sukhija of Rajasthan (IN) for international business machines corporation, Deepak Bajaj of Jaipur (IN) for international business machines corporation
IPC Code(s): G06F9/445, G06F21/60
Abstract: provisioning business functions is provided. a runtime binary activation code is sent to a nodal edge server that has a needed runtime binary for a set of edge devices to perform a business function. a secure shell protocol connection with root operating system access is established to the nodal edge server that has the needed runtime binary to execute the runtime binary activation code.
Inventor(s): Oluwatobi Ajila of Ottawa (CA) for international business machines corporation, Vijay Sundaresan of North York (CA) for international business machines corporation, Thomas J. Watson of Pflugerville TX (US) for international business machines corporation, Daniel Heidinga of Toronto (CA) for international business machines corporation
IPC Code(s): G06F9/455, G06F9/30, G06F9/4401
Abstract: aspects of the invention include systems and methods configured to checkpoint an application executing on a virtual machine. aspects include receiving from a first thread executing on a virtual machine a call to a checkpoint application program interface (api) and suspending, by the virtual machine, execution of all threads other than the first thread. aspects also includes executing, by the virtual machine, all application checkpoint hooks and executing, by the virtual machine, all virtual machine checkpoint hooks. aspects further include creating one or more checkpoint image files.
Inventor(s): Esdras E. Cruz-Aguilar of Round Rock TX (US) for international business machines corporation, Jes Kiran Chittigala of Kukatpally (IN) for international business machines corporation, Santhosh S. Joshi of Miyapur (IN) for international business machines corporation, Ravi A. Shankar of Austin TX (US) for international business machines corporation, Perinkulam I. Ganesh of Round Rock TX (US) for international business machines corporation, Michael S. Fuller of Pflugerville TX (US) for international business machines corporation
IPC Code(s): G06F9/455, G06F9/48, G06F11/14
Abstract: a computer-implemented method according to one embodiment includes assigning a priority to virtual machines (vms), and obtaining pathing information for the vms. at least one of the vms assigned a relatively higher priority is selected to perform a process over at least one of the vms assigned a relatively lower priority. a computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. the program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method. a system according to another embodiment includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. the logic is configured to perform the foregoing method.
Inventor(s): Yohei Ueda of Shinagawa (JP) for international business machines corporation
IPC Code(s): G06F9/455, H04L45/00, H04L45/745, H04L61/103
Abstract: a computer-implemented method, system and computer program product for applying hypervisor-based containers to a cluster of a container orchestration system. a container runtime of a worker node in the cluster of the container orchestration system issues a request to create a sandbox environment to store a pod containing one or more containers. upon creating the sandbox environment for each pod to improve isolation, a network tunnel is created between the worker node and the sandbox environment without packet encapsulation in which the sandbox environment shares the same internet protocol (ip) address as the other end of the network tunnel in the worker node. packets may then be routed (forwarded) from the worker node to the sandbox environment via the network tunnel using source routing. by utilizing such source routing, packet looping is prevented. in this manner, hypervisor-based containers may be applied to a cluster of a container orchestration system.
Inventor(s): Fei Qi of Xi'an (CN) for international business machines corporation, Jian Feng Wang of Xi'An (CN) for international business machines corporation, Meng Jie Li of Xi'An (CN) for international business machines corporation, Rui Gao of Xian (CN) for international business machines corporation, A Long Zhi of Xian (CN) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: a system may include a memory and a processor in communication with the memory. the processor may be configured to perform operations. the operations may include synchronizing a policy between a primary node and a compute node and maintaining a resource registry on a client of the primary node. the operations may include communicating a direct communication between the client and the compute node, and the direct communication may include a first task. the operations may include returning a first result for the first task directly from the compute node to the client.
Inventor(s): Hao SHENG of Ningbo (CN) for international business machines corporation, Rong FU of Ningbo (CN) for international business machines corporation, Pan LI of Beijing (CN) for international business machines corporation, Xiao Lin SUN of Ningbo (CN) for international business machines corporation, Yao CHEN of Beijing (CN) for international business machines corporation, Qing Yuan MENG of Beijing (CN) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: resource optimized forwarding of classified requests to different instances of a microservice is provided. the process includes obtaining classified requests to a microservice. the classified requests are classified based on different microservice resource consumption types. further, the method includes forwarding the classified requests to instances of the microservice with different assigned resource configurations. the forwarding is based on the different microservice resource consumption types of the classified requests.
Inventor(s): Gang TANG of Nanjing (CN) for international business machines corporation, Peng Hui JIANG of Beijing (CN) for international business machines corporation, Ming Shuang XIAN of Wuxi (CN) for international business machines corporation, Qin Yue CHEN of Shanghai (CN) for international business machines corporation
IPC Code(s): G06F9/50, G06F21/55, H04L9/40
Abstract: a serverless computing-based, continuous gateway watch of a data store for data change process is provided. the process includes the gateway interface of the computing environment receiving a watch request from a user system to monitor the data store for data change. based on receiving the watch request, the gateway interface invokes a serverless setup service to establish a connection between the gateway interface and the data store of the computing environment to be monitored for data change. based on receiving, at the gateway interface, a data change indication from the data store, the gateway interface invokes a serverless message process service to mutate the data change indication from the data store into a mutated data change message indicative of a data change at the data store for return to the user system pursuant to the watch request, with the serverless message process service terminating thereafter.
Inventor(s): Brian Frank Veale of Cedar Park TX (US) for international business machines corporation, Arnold Flores of Round Rock TX (US) for international business machines corporation, Andre Laurent Albot of Austin TX (US) for international business machines corporation, Juan M. Casas, JR. of Round Rock TX (US) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: method, computer program product, and computer system are provided. a first migration of a running logical partition (lpar) is performed from a first-generation computer to a second-generation computer. availability of a facility differs between the first- and second-generation computers. upon completion of the first migration, an operating system of the running lpar detects whether a required facility in use on the first-generation computer is available on the second-generation computer. operating system takes an action to continue an orderly execution of the lpar, the operating system, and threads of an application in the lpar depending on the availability of the required facility. a second migration is performed of the running lpar from the second-generation computer back to the first-generation computer. the required facility is available on the first-generation computer. the operating system restores access to threads of the application to the required facility.
Inventor(s): Venkateswara Rao Puvvada of Inkollu (IN) for international business machines corporation, Karrthik Kalaga Gopalakrishnan of Kodaikanal (IN) for international business machines corporation, Saket Kumar of Bettiah (IN) for international business machines corporation, Ashish Chaurasia of Pune (IN) for international business machines corporation
IPC Code(s): G06F11/14, G06F16/27
Abstract: a method for minimizing data transfer and storage utilization on cloud object storage systems is disclosed. in one embodiment, such a method replicates a file from a production system to a cloud object storage system. the method determines whether a number of hard links associated with the file is greater than one. in the event the number is greater than one, the method creates, on the cloud object storage system, a special object for the file and associates the file with the special object. upon creating a hard link on the production system in association with the file, the method replicates the hard link from the production system to the cloud object storage system without replicating data associated with the file. a metadata reference to the special object is added to the hard link on the cloud object storage system. a corresponding system and computer program product are also disclosed.
Inventor(s): Richard Joseph Branciforte of Austin TX (US) for international business machines corporation, Gregory William Alexander of Pflugerville TX (US) for international business machines corporation, Timothy Bronson of Round Rock TX (US) for international business machines corporation, Deanna Postles Dunn Berger of Hyde Park NY (US) for international business machines corporation, Akash V. Giri of Austin TX (US) for international business machines corporation, Aaron Tsai of Hyde Park NY (US) for international business machines corporation
IPC Code(s): G06F12/0842
Abstract: a lower-level cache managing cross-core invalidation (xi) snapshots in a shared-memory multiprocessing system, wherein the management of xi snapshots reduces an amount of required snapshots while allowing shared lower-level caches, comprising: the lower-level cache maintaining respective response sync state for at least one processor in a plurality of processors signifying that a line may have been changed by another processor since last fetched by a requesting processor.
Inventor(s): Bo Chen Zhu of Xi'an (CN) for international business machines corporation, Xi Bo Zhu of Beijing (CN) for international business machines corporation, Xiao Ling Chen of Beijing (CN) for international business machines corporation, Cheng Fang Wang of Beijing (CN) for international business machines corporation
IPC Code(s): G06F16/2455, G06F16/28, G06F16/23
Abstract: embodiments of the present invention provide computer-implemented methods, computer program products and computer systems. embodiments of the present invention can, in response to receiving performance data associated with records, identify whether the received performance data is associated with long transactions. embodiments of the present invention can then, in response to determining that the received performance data is associated with long transactions, storing the performance data. embodiments of the present invention can then classify the stored performance data according to types of transactions the performance data and aggregate the stored performance data based on the classification.
Inventor(s): He Fang Zhang of Beijing (CN) for international business machines corporation, Yan Liu of Beijing (CN) for international business machines corporation, Meng Zhao of Beijing (CN) for international business machines corporation, Hai Long Shi of Beijing (CN) for international business machines corporation
IPC Code(s): G06F16/27, G06F16/23
Abstract: an example operation may include one or more of receiving a message from an agent installed at a data replication server, the message comprising a status identifier of a checksum validation of a data replication operation, identifying a latency value associated with the data replication server, determining whether a data loss has occurred based on the status identifier of the checksum validation and the latency value, and in response to a determination that the data loss has occurred, transmitting a notification of the data loss to a computing system associated with the data replication server.
Inventor(s): Jia Li Yun of Beijing (CN) for international business machines corporation, Yin Xiang Xiong of Beijing (CN) for international business machines corporation, Shan Gu of Beijing (CN) for international business machines corporation, Yan Bin Hu of Beijing (CN) for international business machines corporation, Yao Zhang of Beijing (CN) for international business machines corporation
IPC Code(s): G06F16/35, G06F16/33
Abstract: a computer-implemented method according to one embodiment includes generating a first matrix based on words extracted from documents, and generating a second matrix based on deduplication chunks. the deduplication chunks include words of the documents. word clustering is performed based on an analysis performed on the second matrix. each cluster of the words represents a feature of at least one of the documents. the method further includes generating a third matrix based on the first matrix and the clusters, and performing text mining using the third matrix. a computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. the program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method.
Inventor(s): Paul LLAMAS VIRGEN of Guadalajara (MX) for international business machines corporation, Priyansh JAISWAL of Boca Raton FL (US) for international business machines corporation, Peeyush JAISWAL of Boca Raton FL (US) for international business machines corporation
IPC Code(s): G06F21/44, G03H1/00
Abstract: provided are techniques for continuous authentication for a real time hologram. a request and a hologram are received, where the hologram is embedded with a first key phrase in accordance with a first sequence, and where the first sequence indicates which portions of the first key phrase are embedded in specific locations of the hologram. a first seed and a second seed are retrieved. a second key phrase is generated using the first seed. a second sequence is generated using the second seed. it is determined whether portions of the second key phrase are embedded in specific locations of the hologram in accordance with the second sequence. in response to determining that the portions of the second key phrase are embedded in specific locations of the hologram in accordance with the second sequence, the hologram is displayed, and the request is processed. otherwise, the request is rejected.
Inventor(s): Wei-Han Lee of White Plains NY (US) for international business machines corporation, Pengrui Quan of Los Angeles CA (US) for international business machines corporation, MUDHAKAR SRIVATSA of White Plains NY (US) for international business machines corporation, Changchang Liu of White Plains NY (US) for international business machines corporation
IPC Code(s): G06F21/57, G06F21/56
Abstract: a computer-implemented method, a computer program product, and a computer system for supervised anomaly detection in federated learning. a server in a federated learning system generates a training dataset including malicious data samples and benign data samples. the server trains update-generating models on the malicious data samples and the benign data samples in the training dataset. the server generates benign model updates and malicious model updates, through training the update-generating models. the server trains an anomaly detector on the malicious model updates and the benign model updates. the server deploys the anomaly detector to the federated learning system, for supervised anomaly detection in the federated learning system.
Inventor(s): Sandhya Koteshwara of White Plains NY (US) for international business machines corporation, Lars Schneidenbach of Bedford Hills NY (US) for international business machines corporation, Eun Kyung Lee of Bedford Corners NY (US) for international business machines corporation
IPC Code(s): G06F21/57, G06F21/54, G06F21/55
Abstract: one embodiment of the invention provides a method comprising identifying hardware and software components of a system architecture, and generating a multi-layered graph based on the hardware and software components. the multi-layered graph includes a hardware layer representing a lowest level of hardware architecture of the system architecture. the method further comprises extracting one or more properties of the multi-layered graph, computing one or more security metrics based on the one or more properties, and quantifying a security risk of the system architecture based on the one or more security metrics.
Inventor(s): Rakesh Rameshrao Pimplikar of Bangalore (IN) for international business machines corporation, Ritwik Chaudhuri of Bangalore (IN) for international business machines corporation, Pranay Kumar Lohia of Bhagalpur (IN) for international business machines corporation, Ramasuri Narayanam of ANDHRA PRADESH (IN) for international business machines corporation, Sameep Mehta of BANGALORE (IN) for international business machines corporation, Gyana Ranjan Parija of New Delhi (IN) for international business machines corporation
IPC Code(s): G06F30/27, G06Q10/06
Abstract: an example operation may include one or more of identifying an external system that passes an input attribute to a process based on a workflow representation of the process, building a simulator of the external system based on attributes of the external system identified from the workflow representation, simulating future values of the input attribute to be passed to the process by the external system based on the simulator of the external system and a previous simulation run of the process performed via a workflow software application, and executing a new simulation of the process via the workflow software application based on the simulated future values of the input attribute.
Inventor(s): Cheng Qian of Markham (CA) for international business machines corporation, Haode Qi of Cambridge MA (US) for international business machines corporation, Saloni Potdar of Cambridge MA (US) for international business machines corporation, Ladislav Kunc of Cambridge MA (US) for international business machines corporation
IPC Code(s): G06F40/40, G06N5/02
Abstract: methods, systems, and computer program products for detecting out-of-domain text data in dialog systems using artificial intelligence techniques are provided herein. a computer-implemented method includes updating artificial intelligence techniques related to out-of-domain text data detection, the updating based on encoding training data and generating regularized representations of at least a portion of the encoded training data by combining the at least a portion of the encoded training data and at least one intent centroid associated with the updated artificial intelligence techniques; encoding input text data; computing out-of-domain scores, in connection with the at least one dialog system, for at least a portion of the encoded input text data by processing the at least a portion of encoded input data using at least a portion of the one or more updated artificial intelligence techniques; and performing one or more automated actions based on the computed out-of-domain scores.
Inventor(s): Pierre L. Dognin of White Plains NY (US) for international business machines corporation, Inkit Padhi of White Plains NY (US) for international business machines corporation, Igor Melnyk of White Plains NY (US) for international business machines corporation, Payel Das of Yorktown Heights NY (US) for international business machines corporation
IPC Code(s): G06F40/58, G06N20/00
Abstract: obtain access to a pretrained encoder-decoder language model. using a dataset including a plurality of text-graph pairs, carry out first fine-tuning training on the pre-trained language model by minimizing cross-entropy loss. a text portion of each text-graph pair includes a list of text tokens and a graph portion of each text-graph pair includes a list of graph tokens. the first fine-tuning training results in an intermediate model. carry out second fine-tuning training on the intermediate model, by reinforcement learning, to obtain a final model. make the final model available for deployment.
Inventor(s): Shivaram Subramanian of Frisco TX (US) for international business machines corporation, Wei Sun of Scarsdale NY (US) for international business machines corporation, Markus Ettl of Yorktown Heights NY (US) for international business machines corporation
IPC Code(s): G06N5/00, G06N5/02
Abstract: a computer-implemented machine learning method includes accessing a decision tree associated with a path-based machine learning model. the decision tree is split into a plurality of multiway decision trees in a path-based formulation, each of the plurality of decision trees having an attribute not occurring more than once in each of the plurality of decision trees. a problem associated with the machine learning model is solved using one or more of the plurality of decision trees in which one or more decision rules of the decision tree are mapped using a mixed-integer program (mips).
Inventor(s): Michael BARRY of Limerick City (TF) for international business machines corporation, Joern PLOENNIGS of Dublin (IE) for international business machines corporation, John SHEEHAN of Dublin (IE) for international business machines corporation, Claudio GAMBELLA of Phibsborough (IE) for international business machines corporation
IPC Code(s): G06N5/02, G06F40/295, G06N5/04
Abstract: various embodiments are provided for configuring optimization problems from one or more sources in a computing environment by a processor. a knowledge graph may be generated from a knowledge domain and one or more data sources. one or more graph pattens may be applied to match one or more entities in the knowledge graph with one or more atomic optimization templates. an optimization problem configured from the one or more atomic optimization templates and a plurality of data may be executed.
Inventor(s): Nadiya Kochura of Bolton MA (US) for international business machines corporation, Indervir Singh Banipal of Austin TX (US) for international business machines corporation, Shikhar Kwatra of San Jose CA (US) for international business machines corporation, Sourav Mazumder of San Ramon CA (US) for international business machines corporation
IPC Code(s): G06N5/02, G06F16/901, H04L41/0894, H04L41/16, H04L41/5006
Abstract: a computer-implemented method according to one embodiment includes building a knowledge graph of resource vendors. the method further includes identifying resources that are in relatively short supply in a host system, and determining, using a matching algorithm, a first of the resource vendors in the knowledge graph from which to temporarily lease the identified resources to the host system. the first resource vendor includes the identified resources and satisfies policy prerequisites of the host system. a lease is caused to be issued, from the first resource vendor to the host system, for the identified resources. a computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. the program instructions are readable and/or executable by a computer to cause the computer to perform the foregoing method.
Inventor(s): Jared Barney Hertzberg of Yorktown Heights NY (US) for international business machines corporation, Sami Rosenblatt of White Plains NY (US) for international business machines corporation, Easwar Magesan of Mount Kisco NY (US) for international business machines corporation, John Aaron Smolin of Yorktown NY (US) for international business machines corporation
IPC Code(s): G06N10/00, G06F13/40, H10N99/00
Abstract: techniques facilitating frequency allocation in multi-qubit circuits are provided. in one example, a computer-implemented method comprises determining, by a device operatively coupled to a processor, an estimated fabrication yield associated with respective qubit chip configurations by conducting simulations of the respective qubit chip configurations at respective frequency offsets; and selecting, by the device, a qubit chip configuration from among the respective qubit chip configurations based on the estimated fabrication yield associated with the respective qubit chip configurations.
Inventor(s): Devin Underwood of New York NY (US) for international business machines corporation, Timothy Phung of Milpitas CA (US) for international business machines corporation, Muir Kumph of Croton on Hudson NY (US) for international business machines corporation
IPC Code(s): G06N10/40
Abstract: one or more systems, devices, and/or methods of use provided herein relate to signal filters for scalable quantum computing architectures. according to one embodiment, a device can comprise a circuit board comprising a plurality of layers, wherein various ones of the plurality of layers comprises a different absorptive material, and a plurality of signal lines that pass through the circuit board, wherein a first layer of the circuit board is comprised of a first material that filters a first signal line that traverses through at least the first layer of the plurality of layers.
Inventor(s): Jae-Eun Park of Wappingers Falls NY (US) for international business machines corporation, Abhijit Mitra of The Woodlands TX (US) for international business machines corporation, Vladimir Rastunkov of Mundelein IL (US) for international business machines corporation, Vaibhaw Kumar of Frederick MD (US) for international business machines corporation, Dimitrios Alevras of West Chester PA (US) for international business machines corporation
IPC Code(s): G06N10/40, G06N20/10
Abstract: a processor can control quantum hardware to transform qubit states associated with a plurality of pairs of data points in a training dataset using a circuit parameter representing a rotation angle. inner products of transformed qubit states associated with the plurality of pairs of data points can be computed. the processor can minimize an objective function based on the inner products, where the minimizing finds a target circuit parameter representing a target rotation angle that minimizes the objective function. a processor can build a kernel matrix based on the inner products computed for a sample dataset and the target circuit parameter passed to the quantum hardware. a classification algorithm can use the kernel matrix to classify the sample dataset.
Inventor(s): Manish Kesarwani of Bengaluru (IN) for international business machines corporation, Pranay Kumar Lohia of Bhagalpur (IN) for international business machines corporation, Ramasuri Narayanam of Andhra Pradesh (IN) for international business machines corporation, Rakesh Rameshrao Pimplikar of Bangalore (IN) for international business machines corporation, Sameep Mehta of Bangalore (IN) for international business machines corporation
IPC Code(s): G06N20/00, G06N7/00
Abstract: a method, computer program, and computer system are provided for online fairness monitoring. a dataset having one or more entries with one or more protected attributes and data corresponding to a trained machine learning model is received. an entry having a maximum reward is selected based on a reward probability associated with the entry. a determination is made as to whether bias has developed in the trained machine learning model toward one or more of the one or more protected attributes based on a change to the reward probability or a distribution of reward probabilities exceeding a threshold value.
Inventor(s): Lukasz G. Cmielowski of Krakow (PL) for international business machines corporation, Daniel Jakub Ryszka of Krakow (PL) for international business machines corporation, Oronde Jason Tucker of Ajax (CA) for international business machines corporation, Maksymilian Erazmus of Kraków (PL) for international business machines corporation
IPC Code(s): G06N20/00
Abstract: aspects of the invention include systems and methods configured for federated automatic machine learning. a non-limiting example computer-implemented method includes defining a search process including a model configuration for building an automatic machine learning pipeline definition and distributing the search process across a plurality of parties. each member of the plurality of parties retains federated data including training data and holdout data. the method includes receiving, from each member of the plurality of parties, an evaluation result of the model configuration against respective holdout data and aggregating the received evaluation results to define aggregated parameters. a new pipeline definition is generated from the aggregated parameters and trained local models received from each member of the plurality of parties are aggregated to define an aggregated model. each trained local model includes the new pipeline definition.
Inventor(s): Shaikh Shahriar Quader of Scarborough (CA) for international business machines corporation, Aindrila Basak of Edmonton (CA) for international business machines corporation, Adrian Mahjour of Toronto (CA) for international business machines corporation, Petr Novotny of Mount Kisco NY (US) for international business machines corporation, CARLO APPUGLIESE of Seminole FL (US) for international business machines corporation, Berthold Reinwald of San Jose CA (US) for international business machines corporation, Dheeraj Arremsetty of Austin TX (US) for international business machines corporation
IPC Code(s): G06N20/00, G06K9/62
Abstract: providing a representative dataset from an initial dataset by accessing a dataset associated with a machine learning model, receiving input parameters associated with the representative dataset selection, the input parameters including an evaluation metric, determining a density of a plurality of datapoints associated with the dataset, training a first iteration of a machine learning model using a first data point selected according to the density, determining a first value of the evaluation metric for the first iteration of the machine learning model, generating a representative subset based on the first value of the evaluation metric value, and providing the representative dataset and a final machine learning model trained using the representative dataset.
Inventor(s): Arpan Mukherjee of West Bengal (IN) for international business machines corporation, Georgios Kollias of White Plains NY (US) for international business machines corporation, Theodoros Salonidis of Wayne PA (US) for international business machines corporation, Shiqiang Wang of White Plains NY (US) for international business machines corporation
IPC Code(s): G06N20/00
Abstract: a computer-implemented method, a computer program product, and a computer system for automatic adaptive client selection in federated learning. a server sends parameters of a machine learning model to all of clients, where all of the clients compute respective gradients using the parameters. the server receives sketches of the respective gradients, where the sketches are computed by all of the clients. the server uses the sketches to compute similarity between all of the clients and clusters the all of the clients based on the similarity. the server optimizes a number of client clusters and a dimension of the sketches, subject to a constraint of memory consumption, a constraint of communication overhead, and a performance metric. the server determines a subset of the clients that send the respective gradients, by selecting the clients from the client clusters. the server aggregates the respective gradients sent by the subset of the clients.
Inventor(s): Soumitra Sarkar of Cary NC (US) for international business machines corporation, Yu Deng of Yorktown Heights NY (US) for international business machines corporation, John Alan Bivens of Ossining NY (US) for international business machines corporation, Muhammad Jawad Paracha of Karachi (PK) for international business machines corporation, Ruchi Mahindru of Elmsford NY (US) for international business machines corporation
IPC Code(s): G06Q10/06, G06Q10/00
Abstract: an embodiment includes creating an action item record corresponding to an action item of an action plan record that is responsive to a service request. the action item record comprises a service requirement of the action item. the embodiment executes a querying process that searches vendor records for candidate vendors associated with the service requirement and returns a set of candidate vendors. the embodiment updates the action item record with the set of candidate vendors and determines an optimal vendor team based at least in part on reputation data and cost data associated with each of the candidate vendors. the embodiment updates the action plan record to include the optimal vendor team, which triggers creation of a vendor team dispatch request.
Inventor(s): Allison Kei Ishida of Alameda CA (US) for international business machines corporation, Su Liu of Austin TX (US) for international business machines corporation, Diana Isabelle Ovadia of Camarillo CA (US) for international business machines corporation, Chloe McCracken of West Harrison IN (US) for international business machines corporation
IPC Code(s): G06Q10/08, G06Q30/06
Abstract: according to one embodiment, a method, computer system, and computer program product for item management is provided. the present invention may include identifying all items within sensor feeds of a sensor set within a venue; creating a list comprising entries for the identified items, the entries comprising a name, location and presence of the items; based on continuously monitoring the sensor feeds, dynamically updating the list to track the location and/or presence of the items in real time; responsive to receiving a query from a user requesting a lost item, selecting an item in the list that matches the name of the lost item; and guiding the user to the location of the selected item.
Inventor(s): Raghuveer Prasad Nagar of Kota (IN) for international business machines corporation, Gaurav Mahesh Pandit of Puntamaba (IN) for international business machines corporation, Harshit Sharma of Hathras (IN) for international business machines corporation, Smitha Majur of Bengaluru (IN) for international business machines corporation
IPC Code(s): G06Q30/02, G06Q30/06
Abstract: a computer implemented method, apparatus, system, and computer program product for recommending item attributes. a computer system determines the item attributes in an item profile for an item offered by a seller on an item transaction platform. the computer system identifies interactions between the seller and a potential buyer regarding the item. the computer system determines a set of missing item attributes from the item profile based on the interactions between the seller and the potential buyer. the computer system recommends a set of actions for the set of missing item attributes identified to a seller of the item in a recommendation. the computer system performs a set of actions in the recommendation using the set of missing item attributes in response to a user input from the seller responding to the recommendation.
Inventor(s): Shikhar Kwatra of San Jose CA (US) for international business machines corporation, Vijay Ekambaram of Chennai (IN) for international business machines corporation, Anvita Vyas of Madhya Pradesh (IN) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06Q30/02
Abstract: using a trained neural network to transform user ratings into standardized user ratings is provided. respective attribute-based leniency and strictness rating scores are generated for a plurality of attributes associated with a product category using the trained neural network based on historical user ratings of products in the product category. a set of attributes associated with a product included in the product category is identified. an overall leniency and strictness rating score is determined for the product using the trained neural network based on a set of attribute-based leniency and strictness rating scores for the set of attributes associated with the product included in the product category. a user rating of the product is received. the user rating of the product is adjusted based on the overall leniency and strictness rating score for the product included in the product category to form a standardized user rating for the product.
Inventor(s): Robert Huntington Grant of Marietta GA (US) for international business machines corporation, Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Todd Russell Whitman of Bethany CT (US) for international business machines corporation
IPC Code(s): G06T19/00, A61B5/16
Abstract: according to one embodiment, a method, computer system, and computer program product for mixed-reality emotional modification is provided. the present invention may include collecting biometric information on a user; identifying a mental state of the user based on the biometric information; and, responsive to determining that the mental state does not match an expected baseline associated with a mixed-reality experience, modifying the mixed-reality experience with one or more virtual content elements.
Inventor(s): Luis Osvaldo Pizana of Austin TX (US) for international business machines corporation, Su Liu of Austin TX (US) for international business machines corporation, Fang Lu of Billerica MA (US) for international business machines corporation, Nadiya Kochura of Bolton MA (US) for international business machines corporation
IPC Code(s): G06T19/00, G06Q10/06, G06Q10/10, G06V20/20
Abstract: the program intelligently assigns a virtual office layout (vol) to one or more actual users' real on-site office layout (rol) based on human resource mapping. the method maps the one or more actual users' rol to a correlated vol, according to human resource data and a real building floor map. the method creates an augmented virtual office layout (avol) based on the mapping. the method customizes the avol according to the one or more actual users' preferences and real office location and tracks the one or more users' activities on the avol. the method renders the one or more users' real or preferred office location and the one or more users' virtual position on the avol.
Inventor(s): Tanveer Syeda-Mahmood of Cupertino CA (US) for international business machines corporation, Neha Srivathsa of Mercer Island WA (US) for international business machines corporation, Raziuddin Mustafa Mahmood of Cupertino CA (US) for international business machines corporation
IPC Code(s): G06V10/77, G06V10/44, G06V10/764, G06V10/82
Abstract: techniques for spatially preserving flattening in deep learning neural networks are provided. in one aspect, a spatially preserving flattening module includes: a predictor for generating image feature maps from at least one convolutional layer of a feature extraction phase of a deep learning neural network applied to input image data; an auto-encoder for producing encodings of the image feature maps that preserve location and shape information associated with objects in the input image data; and a flattener for concatenating the encodings of the image feature maps to form a spatially preserving flattened encoding vector. a deep learning neural network that includes the present spatially preserving flattening module is also provided, as is a method for spatially preserving flattening.
Inventor(s): Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Mahesh Malatesh Chitragar of Bangalore (IN) for international business machines corporation
IPC Code(s): G08G1/0967, B60W50/14, B60W60/00, G06F3/01
Abstract: systems, methods and/or computer program products for improving autonomous vehicle operation by enabling communication between the autonomous vehicles and bci systems publishing signals from nearby pedestrians. wearable bci devices worn by pedestrians analyze brainwave signals and classify the brainwave signals in order to filter out signals that are unrelated to crossing the street or the directionality of travel by the pedestrian. bci devices publish, or broadcast brain wave signals related to crossing the street or directionality of travel to the surrounding area where autonomous vehicle receive and process the brainwave signals being published. the autonomous vehicles predict movements of nearby pedestrians based on the intended direction of travel signified by the collected brainwave signals, and the autonomous vehicles select driving actions in response to the anticipated movements of nearby pedestrians.
Inventor(s): Mary A Mt. Pleasant of Tyngsboro MA (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G09B5/02
Abstract: in an approach to mixed reality scenario generation for cross industry training, a computer receives data associated with tasks performed by a user. a computer identifies an activity in a first industry associated with the tasks. a computer determines that one or more activities associated with a job in a second industry are similar to the activity in the first industry. a computer generates a mixed reality scenario representing a virtual work environment associated with the second industry using mixed reality. a computer generates the one or more activities associated with the job in the second industry in the mixed reality scenario. a computer displays the virtual work environment associated with the second industry and the one or more activities associated with the job in the second industry to the user in a device for viewing a mixed reality scenario while the user performs the activity in the first industry.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Shailendra Moyal of Pune (IN) for international business machines corporation, Akash U. Dhoot of Pune (IN) for international business machines corporation, Nitika Sharma of Zirakpur (IN) for international business machines corporation
IPC Code(s): G10L21/0216, G10L25/30
Abstract: according to one embodiment, a method, computer system, and computer program product for front-end clipping reduction is provided. the embodiment may include initiating an audio interaction. the embodiment may also include predicting a change in network connectivity within the audio interaction. the embodiment may further include, in response to the predicted change in network connectivity, determining whether to perform a voice clarity improvement. the embodiment may also include, in response to determining to perform the voice clarity improvement, performing the voice clarity improvement for the audio interaction.
Inventor(s): Radu Ioan Stoica of Zurich (CH) for international business machines corporation, Roman Alexander Pletka of Uster (CH) for international business machines corporation, Nikolas Ioannou of Zurich (CH) for international business machines corporation, Nikolaos Papandreou of Thalwil (CH) for international business machines corporation, Charalampos Pozidis of Thalwil (CH) for international business machines corporation, Timothy J. Fisher of Cypress TX (US) for international business machines corporation, Aaron Daniel Fry of Richmond TX (US) for international business machines corporation
IPC Code(s): G11C29/02, G11C29/52
Abstract: threshold voltage shift values, or tvs values, are calibrated for a non-volatile memory unit including strings of memory cells organized into memory pages, the memory pages being organized into blocks. the calibration involves a read operation to read a given page of the memory pages, based on given one or more tvs values for the given page. in response to a read failure of the read operation, the calibration determines one or more corrected tvs values based on one or more reference tvs values of one or more reference pages of the memory pages. the calibration subsequently performs a read operation to read the given page based on the one or more corrected tvs values. this calibration exploits tvs values of reference pages to determine corrected tvs values of the failing page, instead of finding appropriate tvs values by repeatedly re-reading the failing page.
Inventor(s): Rodrigo Neumann Barros Ferreira of Rio De Janeiro (BR) for international business machines corporation, Ricardo Luis Ohta of SAO PAULO (BR) for international business machines corporation, Yogesh V. Joshi of Bridgewater NJ (US) for international business machines corporation, Mathias B. Steiner of RIO DE JANEIRO (BR) for international business machines corporation, Tonia Elengikal of Yorktown Heights NY (US) for international business machines corporation, Binquan Luan of Yorktown Heights NY (US) for international business machines corporation, Ashish B. Mhadeshwar of Garnet Valley PA (US) for international business machines corporation, Jayashree Kalyanaraman of Clinton NJ (US) for international business machines corporation, Anantha Sundaram of Annandale NJ (US) for international business machines corporation, Sumathy Raman of Annandale NJ (US) for international business machines corporation
IPC Code(s): G16C20/30
Abstract: ranking materials for post combustion carbon capture by characterizing sorbent materials with a molecular model workflow that generates microscopic figures of merit for materials by microscopic properties; and evaluating the materials from the molecular model workflow with a process model workflow that generates macroscopic figures of merit for process steps of a carbon recovery process. the materials for applicability as a sorbent material are ranked using a combined microscopic performance and macroscopic process feasibility generator that ranks the materials according to the microscopic figures of merit for materials and the macroscopic figures of merit for the process steps.
Inventor(s): Su Chen Fan of Cohoes NY (US) for international business machines corporation, Jay William Strane of Warwick NY (US) for international business machines corporation, Gen Tsutsui of Glenmont NY (US) for international business machines corporation, Stuart Sieg of Albany NY (US) for international business machines corporation
IPC Code(s): H01L21/762, H01L21/8238, H01L25/065, H01L29/06, H01L29/786
Abstract: a stacked field effect transistor (fet) device. the device includes an opening in a shallow trench isolation (sti) region on a substrate. the device also includes an epitaxy region located on the substrate at a bottom portion of sti region in the opening. the device further includes a substrate contact that directly contacts the epitaxy region.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L21/8238, H01L27/092, H01L29/40, H01L29/417, H01L29/423, H01L29/66, H01L29/775
Abstract: a semiconductor structure is presented including a first dielectric isolation pillar disposed between a pair of p-type field effect transistors (pfets), a second dielectric isolation pillar disposed between a pair of n-type fets (nfets), a first source/drain (s/d) epi region having a first contact electrically connected to a backside power delivery network (bspdn), the first contact being disposed on one side of the first dielectric isolation pillar, and a second s/d epi region having a second contact electrically connected to back-end-of-line (beol) components, the second contact being disposed on the other side of the first dielectric isolation pillar.
Inventor(s): Chanro Park of Clifton Park NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Yann Mignot of Slingerlands NY (US) for international business machines corporation, Hsueh-Chung Chen of Cohoes NY (US) for international business machines corporation
IPC Code(s): H01L23/522, H01L21/311, H01L21/768, H01L23/528, H01L23/532
Abstract: a microelectronics structure including a skip level via extending from an upper level metal line in an upper level of the at least two interlevel dielectric levels through a first an interlevel dielectric level that is on the substrate level without contacting an interlevel metal line. the skip level via extends into electrical contact with a first element of electrical contact features in a lower level of the at least two interlevel dielectric levels. the skip level via includes a spacer that is present on sidewalls of the skip level via. the structure also includes a single level via, in which the dielectric material of the spacer of the skip level via is not present on the sidewalls of the single level via.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Brent A. Anderson of Essex Junction VT (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768
Abstract: a semiconductor apparatus includes a substrate; a first conductive feature disposed on the substrate, the first conductive feature comprising a conductive material; a second conductive feature disposed on the substrate, the second conductive feature comprising the conductive material; a dielectric material at least partially surrounding the first conductive feature and the second conductive feature; and an interconnect between the first conductive feature and the second conductive feature, the interconnect comprising the conductive material integral with the first conductive feature and the second conductive feature and extending through the dielectric material and below the first conductive feature and the second conductive feature.
Inventor(s): Liqiao Qin of Albany NY (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chen Zhang of Guilderland NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8234, H01L23/522, H01L27/088, H01L29/40, H01L29/417, H01L29/66
Abstract: semiconductor devices and methods of forming the same include a semiconductor base having a first width. a semiconductor device over the semiconductor base has a second width that is greater than the first width. a power rail is beneath the semiconductor base. a conductive contact extends from a top of the semiconductor device to the power rail.
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, David Wolpert of Poughkeepsie NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/822, H01L21/8238, H01L27/092, H01L29/06, H01L29/417, H01L29/423, H01L29/66, H01L29/775, H01L29/786
Abstract: a semiconductor structure includes a first field-effect transistor having a first back side source/drain contact, a second back side source/drain contact, and a first power line and a first signal line each connected to the first back side source/drain contact and the second back side source/drain contact, respectively. the semiconductor structure further includes a second field-effect transistor vertically stacked above the first field-effect transistor. the second field-effect transistor having a first front side source/drain contact, a second front side source/drain contact, and a first power line and a first signal line each connected to the first front side source/drain contact and the second front side source/drain contact, respectively.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Hosadurga Shobha of Niskayuna NY (US) for international business machines corporation, Huai Huang of Clifton Park NY (US) for international business machines corporation
IPC Code(s): H01L23/532, H01L23/522, H01L23/528
Abstract: a semiconductor interconnect structure comprises a substrate, a plurality of metal lines disposed relative to the substrate and a plurality of first and second caps disposed on the metal lines wherein the first caps comprise a first dielectric material and the second caps comprise a second dielectric material different from the first dielectric material.
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation
IPC Code(s): H01L25/065, H01L23/00, H01L23/528, H01L25/00, H01L25/18
Abstract: an integrated circuit (ic) assembly method is provided. the method includes fabricating a first wafer including a first device with a back end of line (beol) and first terminals of first and second types at the beol and fabricating a second wafer including a second device for back side power delivery network (bspdn) processing, second terminals of the first type, first vias and second vias. the first and second wafers are bonded at the beol to connect the second terminals of the first type to a subset of the first terminals of the first type, the first vias to remaining first terminals of the first type, and the second vias to the first terminals of the second type. a bspdn is built onto a backside of the second wafer to include first and second bspdn terminals connected to the first and second vias, respectively.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Indira Seshadri of Niskayuna NY (US) for international business machines corporation, Cheng Chi of Jersey City NJ (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation
IPC Code(s): H01L27/02, H01L27/118
Abstract: a circuit is presented including a plurality of cells separated by a plurality of cell boundaries and at least one curved gate cut region disposed over a curved cell boundary of the plurality of cell boundaries. the at least one curved gate cut region separates a reduced active area from a widened active area. the reduced active area is defined above the curved cell boundary and the widened active area is defined below the curved cell boundary.
Inventor(s): Andrew Gaul of Halfmoon NY (US) for international business machines corporation, Anthony I. Chou of Guilderland NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Andrew M. Greene of Slingerlands NY (US) for international business machines corporation
IPC Code(s): H01L27/06, H01L21/02, H01L21/265, H01L29/06, H01L29/423, H01L29/66, H01L29/775, H01L29/786, H01L29/861
Abstract: techniques for co-integrating gate-all-around nanosheet devices having bottom dielectric isolation with an ideal vertical p-n-p diode on a common substrate are provided. in one aspect, a semiconductor structure includes: a diode in a first region of a bulk substrate, where the diode includes p-n-p vertical implanted layers present in the bulk substrate, and a single source/drain region epitaxial material disposed on the p-n-p vertical implanted layers; and a nanosheet device with a bottom dielectric isolation layer in a second region of the bulk substrate. the nanosheet device can include nanosheet channels and gates that surround a portion of each of the nanosheet channels in a gate-all-around configuration. a method of fabricating the present semiconductor structures is also provided.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Chen Zhang of Guilderland NY (US) for international business machines corporation
IPC Code(s): H01L27/088, H01L23/528, H01L29/06, H01L29/417, H01L29/423, H01L29/786
Abstract: a semiconductor structure is provided that includes a first pair of stacked devices located in a first active device region and a second pair of stacked devices located in a second active device region. each stacked device of the pair of stacked devices includes a second field effect transistor (fet) stacked over a first fet, and within each active device region the pair of stacked devices is separated by an inter-device dielectric pillar. a local interconnect structure is located in a non-active device region that is positioned between the first and second active device regions. the local interconnect structure can be connected to a back side power rail and a source/drain region of one of the second fets, or connected to a front side signal line and a source/drain region of one of the first fets.
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L21/8238, H01L29/06
Abstract: a semiconductor structure includes a first stacked device structure. the first stacked device structure includes a first field-effect transistor disposed on a substrate having a front side and a back side. the first field-effect transistor has a first source/drain region. the first stacked device structure further includes a second field-effect transistor vertically stacked above the first field-effect transistor. the second field-effect transistor has a second source/drain region. the first stacked device structure further includes a first front side source/drain contact disposed on the first source/drain region and a first back side source/drain contact disposed on the second source/drain region. the first stacked device structure further includes a first isolation pillar structure located within the first field-effect transistor, the second field-effect transistor, the first front side source/drain contact and the first back side source/drain contact.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L27/092, H01L21/8238, H01L29/08, H01L29/417, H01L29/66, H01L29/78
Abstract: a semiconductor device includes a first vertical field-effect transistor comprising a first set of vertical fins and a second set of vertical fins separated by a first isolation pillar structure. the semiconductor device further includes a second vertical field-effect transistor adjacent to the first vertical field-effect transistor, the second vertical field-effect transistor comprising a first set of vertical fins and a second set of vertical fins separated by a second isolation pillar structure.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Junli Wang of Slingerlands NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation
IPC Code(s): H01L29/08, H01L23/48, H01L29/06, H01L29/775, H01L29/786
Abstract: a semiconductor structure is presented including a first source/drain (s/d) epi region having a first contact completely wrapping around the first s/d epi region, the first contact electrically connected to a backside power delivery network (bspdn) and a second s/d epi region having a second contact directly contacting a first sidewall, a second sidewall, and a top surface of the second s/d epi region, the second contact electrically connected to back-end-of-line (beol) components.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L27/12, H01L29/40
Abstract: backside and frontside contact structures wrapping around source/drain regions provide increased contact areas for electrical connections and allow increased silicide areas. sidewall metallization of epitaxially grown source/drain regions provides source/drain sidewall contacts that enable wrap-around contact formation on both the front side and the back side of a semiconductor device layer. front side and back side contact metallization over the source/drain sidewall contacts allows wrap-around contact structures on both sides of the device layer.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Chanro Park of Clifton Park NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L21/8238, H01L27/12, H01L29/40
Abstract: backside self-aligned contact designs using a replacement contact process with unique placeholder profile are provided. in one aspect, a semiconductor device includes: a field-effect transistor(s) on a frontside of the device; backside power rails on a backside of the device; a backside source/drain region contact connecting a given one of the backside power rails to a source/drain region of the field-effect transistor(s), and a dielectric placeholder(s) between the given backside power rail and another source/drain region of the field-effect transistor(s), where a first end of the dielectric placeholder(s) having a width w directly contacts the given backside power rail, a second end of the dielectric placeholder(s) having a width w directly contacts the other source/drain region, where w>w. the field-effect transistor(s) can include a stack of active layers with bottom dielectric isolation, and a gate-all-around configuration. a method of fabricating the present semiconductor devices is also provided.
Inventor(s): Liqiao Qin of Albany NY (US) for international business machines corporation, Nikhil Jain of Apple Valley MN (US) for international business machines corporation, Prabudhya Roy Chowdhury of Albany NY (US) for international business machines corporation, Sagarika Mukesh of Albany NY (US) for international business machines corporation, Tao Li of Slingerlands NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L29/423, H01L23/528, H01L29/786
Abstract: a semiconductor device includes a first transistor including a first source/drain region, and a second transistor stacked on the first transistor. the second transistor includes a second source/drain region. the semiconductor device further includes a via structure disposed between a power element and the second source/drain region. the via structure includes a first via disposed on the power element, and a second via disposed on the first via, wherein the second via is angled with respect to the first via.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Chun-Chen Yeh of Danbury CT (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation
IPC Code(s): H01L29/78, H01L29/08, H01L29/66
Abstract: a semiconductor device includes: a vertical transport field-effect transistor (vtfet) device including a bottom source/drain (s/d) epitaxial layer, a vertical fin channel formed on the bottom s/d epitaxial layer, and a top s/d epitaxial layer formed on the vertical fin channel. the bottom s/d epitaxial layer has an asymmetric profile in cross-section where a first side of the vertical fin channel is aligned with a first side of the bottom s/d epitaxial layer, and the bottom s/d epitaxial layer has a stepped profile that extends beyond a second edge of the vertical fin channel.
Inventor(s): John S. Werner of Fishkill NY (US) for international business machines corporation, Andrew C. M. Hicks of Highland NY (US) for international business machines corporation, Noah Singer of White Plains NY (US) for international business machines corporation, Prabjit Singh of Poughkeepsie NY (US) for international business machines corporation, Sadegh Khalili of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): H01M50/383, H01M50/618, H01M50/636
Abstract: a system and method for flushing the electrolyte out of an electrolyte flushable battery apparatus during a thermal runaway event. at least one condition of the electrolyte flushable battery apparatus is monitored to detect a potential thermal runaway event based on the at least one condition exceeding a threshold value. in response the inlet valve and outlet valves on the battery apparatus are opened. a flushing liquid is flushed or pumped through the battery apparatus where the flushing liquid enters the apparatus through the inlet valve and leaves the apparatus through the outlet valve. the flushing liquid is then stored in a reservoir.
Inventor(s): Qi Feng Huo of Beijing (CN) for international business machines corporation, Yuan Yuan Wang of Beijing (CN) for international business machines corporation, Da Li Liu of Beijing (CN) for international business machines corporation, Yan Song Liu of Beijing (CN) for international business machines corporation, Lei Li of Beijing (CN) for international business machines corporation
IPC Code(s): H04L9/08, G06F9/455
Abstract: user data security is provided. encrypted user data are identified in a virtual machine. a private key of a public/private cryptographic key pair corresponding to a user is retrieved. the encrypted user data is decrypted within the virtual machine utilizing the private key corresponding to the user to form decrypted user data. the encrypted user data are replaced in the virtual machine with the decrypted user data. the decrypted user data is processed in the virtual machine to perform a service in a cloud environment.
Inventor(s): Kelly Nicole Ryver of Roswell GA (US) for international business machines corporation
IPC Code(s): H04L9/40, G06F17/16, G06N10/00, G06N20/00
Abstract: embodiments are disclosed for a method for a security model. the method includes identifying a security threat attack to a security domain by generating a bloch sphere based on a system information and event management (stem) of the security domain and a security threat attack framework. the attack is non-linear. identifying the attack also includes generating a quantum state probabilities matrix (qspm) based on the bloch sphere. further, identifying the attack includes training a security threat model to perform classifications based on the qspm. additionally, identifying the attack includes performing a classification of the security domain that identifies a first attack method using the security threat model. identifying the attack further includes performing a second classification of the security domain that identifies a second attack method. the second attack method follows a non-linear path from the first attack method along the security threat attack framework.
Inventor(s): Hemant Kumar Sivaswamy of Pune (IN) for international business machines corporation, Alberto Pelliccione of Amsterdam (NL) for international business machines corporation
IPC Code(s): H04L9/40
Abstract: a computer implemented method processes alerts. a computer system creates a representation of an alert received for processing. the computer system determines a similarity of the alert with previously processed alerts using the representation of the alert and representations of the previously processed alerts. a first evaluator in the computer system evaluates an alert level for the alert based on previously processed similar alerts in response to the similarity being above a similarity threshold for similar alerts. a second evaluator in the computer system evaluates, the alert level for the alert using a machine learning model in response to the similarity not being above the similarity threshold.
Inventor(s): Melanie Dauber of Oceanside NY (US) for international business machines corporation, Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Jacob Ryan Jepperson of St. Paul MN (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Spencer Thomas Reynolds of Austin TX (US) for international business machines corporation
IPC Code(s): H04N7/15, H04L12/18
Abstract: aspects of the present disclosure relate to web conference contact routing. an indication of a first participant device of a web conference attempting to contact a second participant device of the web conference can be received, where the second participant device is designated as a screen sharer within the web conference during a time of the contact and where the contact is configured to be received on a display shared in the web conference. two or more candidate devices for routing the contact from the first participant device to can be identified. a candidate device of the two or more candidate devices for routing the contact from the first participant device to can be selected using a set of selection criteria. contact from the first participant device can be routed to the selected candidate device instead of the display of the second participant device shared in the web conference.
Inventor(s): Rajesh Kumar Saxena of Thane East (IN) for international business machines corporation, Harish Bharti of Pune (IN) for international business machines corporation, Deepak Bajaj of Jaipur (IN) for international business machines corporation, Sandeep Sukhija of Rajasthan (IN) for international business machines corporation
IPC Code(s): H04W48/18, H04W4/02, H04W72/04
Abstract: setting a primary server within a business density cluster when the business density location changes. a new primary edge provisioning server replaces a current primary edge provisioning server when the business density cluster is determined not to include the current primary edge provisioning server. an edge provisioning framework handles the associations and dissociations of the edge network(s) to build the new primary server within the business density cluster. the former primary server is respawned as a new secondary node to the new primary server.
Inventor(s): Nicolas Jean Loubet of GUILDERLAND NY (US) for international business machines corporation, Kirsten Emilie Moselund of Ruschlikon (CH) for international business machines corporation, Bogdan Cezar Zota of Ruschlikon (CH) for international business machines corporation
IPC Code(s): H01L27/11
Abstract: a microelectronic structure including a bottom transistor having a gate region aligned along a first axis. an upper transistor located on top of the bottom transistor, where the upper transistor has a gate region that is aligned along a second axis, and where the second axis is perpendicular to the first axis.
Inventor(s): Nanbo Gong of White Plains NY (US) for international business machines corporation, Takashi Ando of Eastchester NY (US) for international business machines corporation, Guy M. Cohen of Westchester NY (US) for international business machines corporation, HIROYUKI MIYAZOE of White Plains NY (US) for international business machines corporation
IPC Code(s): H01L27/11507
Abstract: a semiconductor device includes a ferroelectric random-access memory (feram) cell. the feram includes a ferroelectric dielectric that is annealed to attain its ferroelectric phase by an induced current flow and heating process. the current flow may be induced though a temporary wire that causes heating of the feram cell. the resulting heating or anneal of the ferroelectric dielectric may crystalize the ferroelectric dielectric to embody or result in having ferroelectric properties. the induced current flow and heating process is substantially local to the feram cell, and to ferroelectric dielectric therein, as opposed to a global heating or annealing process in which the entire semiconductor device, or a relatively larger region of semiconductor device, is heated to the requisite annealing temperature of ferroelectric dielectric.
Inventor(s): Carl Radens of LaGrangeville NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation, Juntao Li of Cohoes NY (US) for international business machines corporation
IPC Code(s): H01L45/00, H01L23/48, H01L27/24
Abstract: a semiconductor structure is provided in which a phase change memory (pcm) device region including a pcm is located in a back side of a wafer. a pcm device back side source/drain contact structure connects the pcm to a first source/drain structure of a first field effect transistor (fet) that is present in a front side of the wafer, the second source/drain structure of the first fet is connected to a front side beol structure by a front side source/drain contact structure. a logic device region and/or an analog device region can be located laterally adjacent to the pcm device region. a back side power distribution network can be present in the logic device region and/or an analog device region.
Inventor(s): Injo Ok of Loudonville NY (US) for international business machines corporation, Timothy Mathew Philip of Albany NY (US) for international business machines corporation, Jin Ping Han of Yorktown Heights NY (US) for international business machines corporation, Ching-Tzu Chen of Ossining NY (US) for international business machines corporation, Kevin W. Brew of Niskayuna NY (US) for international business machines corporation, Lili Cheng of Rexford NY (US) for international business machines corporation
IPC Code(s): H01L45/00
Abstract: a memory device and method of forming a projection liner under a mushroom phase change memory device with sidewall electrode process scheme to provide self-aligned patterning of resistive projection liner during sidewall electrode formation.
International Business Machines Corporation patent applications on February 29th, 2024
- International Business Machines Corporation
- G03F7/26
- C07C309/06
- C07C309/19
- C07C309/30
- C07C309/39
- C07C311/48
- C07D285/16
- C07F7/22
- C07F9/92
- C07F9/94
- G03F7/004
- International business machines corporation
- G06F3/04883
- G06F40/20
- G06F3/06
- G06F8/10
- G06F8/20
- G06F8/35
- G06F8/75
- G06F40/216
- G06F9/445
- G06F21/60
- G06F9/455
- G06F9/30
- G06F9/4401
- G06F9/48
- G06F11/14
- H04L45/00
- H04L45/745
- H04L61/103
- G06F9/50
- G06F21/55
- H04L9/40
- G06F16/27
- G06F12/0842
- G06F16/2455
- G06F16/28
- G06F16/23
- G06F16/35
- G06F16/33
- G06F21/44
- G03H1/00
- G06F21/57
- G06F21/56
- G06F21/54
- G06F30/27
- G06Q10/06
- G06F40/40
- G06N5/02
- G06F40/58
- G06N20/00
- G06N5/00
- G06F40/295
- G06N5/04
- G06F16/901
- H04L41/0894
- H04L41/16
- H04L41/5006
- G06N10/00
- G06F13/40
- H10N99/00
- G06N10/40
- G06N20/10
- G06N7/00
- G06K9/62
- G06Q10/00
- G06Q10/08
- G06Q30/06
- G06Q30/02
- G06T19/00
- A61B5/16
- G06Q10/10
- G06V20/20
- G06V10/77
- G06V10/44
- G06V10/764
- G06V10/82
- G08G1/0967
- B60W50/14
- B60W60/00
- G06F3/01
- G09B5/02
- G10L21/0216
- G10L25/30
- G11C29/02
- G11C29/52
- G16C20/30
- H01L21/762
- H01L21/8238
- H01L25/065
- H01L29/06
- H01L29/786
- H01L27/092
- H01L29/40
- H01L29/417
- H01L29/423
- H01L29/66
- H01L29/775
- H01L23/522
- H01L21/311
- H01L21/768
- H01L23/528
- H01L23/532
- H01L21/8234
- H01L27/088
- H01L21/822
- H01L23/00
- H01L25/00
- H01L25/18
- H01L27/02
- H01L27/118
- H01L27/06
- H01L21/02
- H01L21/265
- H01L29/861
- H01L29/08
- H01L29/78
- H01L23/48
- H01L27/12
- H01M50/383
- H01M50/618
- H01M50/636
- H04L9/08
- G06F17/16
- H04N7/15
- H04L12/18
- H04W48/18
- H04W4/02
- H04W72/04
- H01L27/11
- H01L27/11507
- H01L45/00
- H01L27/24
- H01L29/42392
