18522829. NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Organization Name
Inventor(s)
NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18522829 titled 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Simplified Explanation
The abstract describes a nonvolatile memory device with a memory cell region, a peripheral circuit region, a memory cell array, a voltage generator, a control logic circuit, and a verify circuit.
- Memory cell region with first metal pad
- Peripheral circuit region with second metal pad
- Memory cell array with memory cells, word lines, and bit line
- Voltage generator supplying supply voltages
- Control logic circuit programming memory cells
- Verify circuit controlling verify operation
Potential Applications
The technology described in the patent application could be applied in various electronic devices requiring nonvolatile memory storage, such as smartphones, tablets, laptops, and other computing devices.
Problems Solved
This technology solves the problem of efficiently programming and verifying memory cells in a nonvolatile memory device, ensuring reliable data storage and retrieval.
Benefits
The benefits of this technology include improved performance, reliability, and efficiency in nonvolatile memory devices, leading to better overall device functionality and user experience.
Potential Commercial Applications
The technology could be commercially applied in the semiconductor industry for manufacturing nonvolatile memory devices with enhanced programming and verification capabilities, catering to the growing demand for high-performance memory solutions.
Possible Prior Art
One possible prior art for this technology could be existing patents or publications related to nonvolatile memory devices with advanced programming and verification circuits.
Unanswered Questions
How does this technology compare to existing nonvolatile memory devices in terms of speed and energy efficiency?
This article does not provide a direct comparison between this technology and existing nonvolatile memory devices in terms of speed and energy efficiency.
What are the potential challenges in implementing this technology on a large scale for commercial production?
The article does not address the potential challenges in implementing this technology on a large scale for commercial production.
Original Abstract Submitted
According to an exemplary embodiment of the inventive concept, there is provided a nonvolatile memory device comprising: a memory cell region including a first metal pad, a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a memory cell array, in the memory cell region, comprising a plurality of memory cells, a plurality of word lines and a bit line connected to the memory cells, wherein each memory cell is connected to one of the word lines, a voltage generator, in the peripheral circuit region, supplying a plurality of supply voltages to the memory cell array, a control logic circuit, in the peripheral circuit region, programming a selected one of the memory cells connected to a selected one of the word lines into a first program state by controlling the voltage generator, and a verify circuit, in the peripheral circuit region, controlling a verify operation on the memory cell array by controlling the voltage generator, wherein the verify circuit controls a word line voltage applied to at least one unselected word line not to be programmed among the plurality of word lines in the verify operation and a bit line voltage applied to the bit line connected differently from a voltage level of a voltage applied in a read operation of the nonvolatile memory device.
