18458069. SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE simplified abstract (Kioxia Corporation)
Contents
- 1 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
Organization Name
Inventor(s)
Junichi Hashimoto of Yokkaichi Mie (JP)
Toshiyuki Sasaki of Yokkaichi Mie (JP)
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18458069 titled 'SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
Simplified Explanation
The semiconductor memory device described in the abstract includes a stacked body with alternating conductive and insulating layers, a pillar penetrating through the stacked body, and varying thicknesses of insulating layers in different regions of the stacked body.
- The semiconductor memory device includes a lower layer and a stacked body above it.
- The stacked body consists of alternating first conductive layers and first insulating layers.
- A pillar penetrates through the stacked body to reach the lower layer.
- In a first region of the stacked body, at least one first insulating layer is thicker than the insulating layers in a second region above it.
- The pillar has a first bowing shape at the height of the thicker insulating layer and a second bowing shape at a height in the second region.
Potential Applications
The technology described in this patent application could be applied in the development of advanced semiconductor memory devices with improved performance and reliability.
Problems Solved
This technology addresses the challenge of optimizing the structure of semiconductor memory devices to enhance their functionality and efficiency.
Benefits
The benefits of this technology include increased data storage capacity, faster data access speeds, and enhanced overall performance of semiconductor memory devices.
Potential Commercial Applications
The innovative features of this technology make it suitable for use in various commercial applications, such as consumer electronics, data storage systems, and computing devices.
Possible Prior Art
One possible prior art for this technology could be the development of semiconductor memory devices with stacked structures and pillars for improved performance and reliability.
Unanswered Questions
How does the varying thickness of insulating layers impact the overall performance of the semiconductor memory device?
The abstract does not provide specific details on how the varying thickness of insulating layers affects the functionality and efficiency of the semiconductor memory device.
What are the specific manufacturing processes involved in creating the stacked body and pillar structure in the semiconductor memory device?
The abstract does not mention the specific manufacturing techniques or processes used to fabricate the stacked body and pillar structure in the semiconductor memory device.
Original Abstract Submitted
According to one embodiment, a semiconductor memory device includes a lower layer, a stacked body above the lower layer with first conductive layers and first insulating layers alternately stacked. A pillar penetrates through the stacked body to reach the lower layer. At least one first insulating layer other than the lowest among the first insulating layers in a first region of the stacked body is thicker than first insulating layers in a second region above the first region. The pillar has a first bowing shape at the height of the at least one thicker first insulating layer and a second bowing shape at a height in the second region.
