18353279. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18353279 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes several key components:
- Lower redistribution layer with lower wiring and lower via
- Embedded region on the lower redistribution layer
- Core layer on the lower redistribution layer with a core via
- Under bump structure with an under bump pad and under bump via
Potential applications of this technology:
- Semiconductor industry for advanced packaging solutions
- Electronics manufacturing for improved performance and reliability
Problems solved by this technology:
- Enhanced connectivity and signal transmission within the semiconductor package
- Improved thermal management and electrical performance
Benefits of this technology:
- Higher efficiency and speed in electronic devices
- Increased durability and longevity of semiconductor packages
- Enhanced overall performance of electronic systems
Original Abstract Submitted
A semiconductor package may include a lower redistribution layer including a lower wiring and a lower via, an embedded region on the lower redistribution layer, a core layer on the lower redistribution layer and including a core via, and an under bump structure including an under bump pad on a lower surface of the lower redistribution layer and an under bump via connecting the lower wiring and the under bump pad, the under bump pad may overlap the under bump via, the lower via, and the core via in a plan view, and the under bump via may be spaced apart from at least one of the lower via and the core via in the plan view.
