18344927. SEMICONDUCTOR PACKAGE INCLUDING AN ADHESIVE STRUCTURE simplified abstract (Samsung Electronics Co., Ltd.)
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SEMICONDUCTOR PACKAGE INCLUDING AN ADHESIVE STRUCTURE
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Inventor(s)
SEMICONDUCTOR PACKAGE INCLUDING AN ADHESIVE STRUCTURE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18344927 titled 'SEMICONDUCTOR PACKAGE INCLUDING AN ADHESIVE STRUCTURE
Simplified Explanation
The abstract describes a semiconductor package that includes a package substrate with bonding pads, a semiconductor chip with chip pads, adhesive films, bonding wires, and a molding portion.
- The package substrate has bonding pads arranged on its upper surface.
- The semiconductor chip is mounted on the upper surface of the package substrate and has chip pads arranged on its upper surface.
- A first adhesive film is attached to the lower surface of the semiconductor chip, corresponding to its area.
- A second adhesive film is attached to the upper surface of the package substrate and is joined to the first adhesive film. The second adhesive film has a larger area than the first adhesive film.
- Bonding wires are present.
- A molding portion is disposed on the upper surface of the package substrate.
Potential applications of this technology:
- Semiconductor packaging for electronic devices
- Integrated circuits and microchips
Problems solved by this technology:
- Provides a secure and reliable connection between the semiconductor chip and the package substrate
- Ensures proper electrical connections between the bonding pads and chip pads
- Protects the semiconductor chip from external elements and damage
Benefits of this technology:
- Improved performance and functionality of electronic devices
- Enhanced durability and reliability of semiconductor packages
- Efficient manufacturing process for semiconductor packaging
Original Abstract Submitted
A semiconductor package includes a package substrate, where a plurality of bonding pads are arranged on an upper surface of the package substrate; a semiconductor chip mounted on the upper surface of the package substrate, where a plurality of chip pads are arranged on an upper surface of the semiconductor chip; a first adhesive film attached to a lower surface of the semiconductor chip, wherein the first adhesive film having a first area corresponding to an area of the semiconductor chip; a second adhesive film attached to the upper surface of the package substrate, where the second adhesive film is joined to the first adhesive film, and the second adhesive film has a second area larger than the first area; a plurality of bonding wires; and a molding portion disposed on the upper surface of the package substrate.