18238291. MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND MEMORY ELEMENT BETWEEN CHANNEL REGION AND CONDUCTIVE PLATE simplified abstract (Micron Technology, Inc.)

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MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND MEMORY ELEMENT BETWEEN CHANNEL REGION AND CONDUCTIVE PLATE

Organization Name

Micron Technology, Inc.

Inventor(s)

Kamal M. Karda of Boise ID (US)

Chandra Mouli of Boise ID (US)

Haitao Liu of Boise ID (US)

Durai Vishak Nirmal Ramaswamy of Boise ID (US)

MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND MEMORY ELEMENT BETWEEN CHANNEL REGION AND CONDUCTIVE PLATE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18238291 titled 'MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND MEMORY ELEMENT BETWEEN CHANNEL REGION AND CONDUCTIVE PLATE

Simplified Explanation

The patent application describes an apparatus with a memory cell that includes different conductive materials and a dielectric portion.

  • Memory cell with memory element, first portion, second portion, dielectric portion, and third portion
  • Data line formed over second and third portions of the memory cell
  • Memory element formed over a conductive region
  • First portion made of first conductive material
  • Second portion made of second conductive material
  • Dielectric portion separating memory element, first portion, and second portion
  • Third portion made of third conductive material, adjacent to second side of dielectric portion

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      1. Potential Applications
  • Non-volatile memory devices
  • Solid-state drives
  • Embedded systems
      1. Problems Solved
  • Improved data storage and retrieval
  • Enhanced memory cell performance
  • Increased data transfer speeds
      1. Benefits
  • Higher data storage capacity
  • Faster data access
  • More reliable memory cells


Original Abstract Submitted

Some embodiments include apparatuses and methods of operating the apparatuses. One of the apparatuses includes a conductive region; a memory cell including a memory element, a first portion, a second portion, a dielectric portion, and a third portion; and a data line formed over the second and third portions of the memory cell. The memory element is formed over the conductive region. The first portion is formed over the memory element and includes a first conductive material. The second portion is formed over the first portion and includes a second conductive material. The dielectric portion includes a first side adjacent the memory element, the first portion, and the second portion. The third portion includes a third conductive material and is adjacent a second side of the dielectric portion and separated from the memory element, the first portion, and the second portion by the dielectric portion.