18237206. TRANSISTORS WITH MITIGATED FREE BODY EFFECT simplified abstract (Micron Technology, Inc.)
Contents
TRANSISTORS WITH MITIGATED FREE BODY EFFECT
Organization Name
Inventor(s)
Kamal M. Karda of Boise ID (US)
Anthony J. Kanago of Boise ID (US)
Soichi Sugiura of Bristow VA (US)
TRANSISTORS WITH MITIGATED FREE BODY EFFECT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18237206 titled 'TRANSISTORS WITH MITIGATED FREE BODY EFFECT
Simplified Explanation
The patent application describes an apparatus with transistors arranged in pairs to address the floating body effect associated with the type of transistors used. The transistors are thin film transistors with a one-gate separated by a gate dielectric from a vertical channel structure. A conductive shield is placed between the channel structures of each transistor pair, with a conductive body below the shield that is shorted to the shield and contacts the channel structures. The shield is coupled to a node set at a constant voltage during operation.
- Thin film transistors arranged in pairs to address floating body effect
- One-gate separated by gate dielectric from vertical channel structure
- Conductive shield between channel structures of transistor pairs
- Conductive body below shield, shorted to shield and contacting channel structures
- Shield coupled to node set at constant voltage during operation
- Potential Applications
- Display technology - Integrated circuits - Sensor devices
- Problems Solved
- Floating body effect in transistors - Improved performance and reliability of electronic devices
- Benefits
- Reduced floating body effect - Enhanced stability and efficiency of transistors - Improved overall performance of electronic devices
Original Abstract Submitted
A variety of applications can include an apparatus having an electronic device including a number of transistors in a pair-wise arrangement that can address a floating body effect associated with the type of transistor implemented in the pair-wise arrangement. The transistors can be structured as thin film transistors having one-gate separated by a gate dielectric from a vertical channel structure. The pair-wise arrangement can include a conductive shield between a channel structure of a transistor of the pair and a channel structure of the other transistor of the other pair. A conductive body can be located below the conductive shield and shorted to the conductive shield, where the conductive body contacts the channel structures of the transistors of the pair-wise arrangement. The conductive shield can be coupled to node to be set at a constant voltage in operation.
