18227139. EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)

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EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES

Organization Name

Micron Technology, Inc.

Inventor(s)

Tingjun Xie of Milpitas CA (US)

Yang Liu of San Jose CA (US)

Juane Li of Milpitas CA (US)

Aaron Lee of Sunnyvale CA (US)

Jiangli Zhu of San Jose CA (US)

EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18227139 titled 'EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES

Simplified Explanation

The patent application describes a processing device in a memory sub-system that traverses management units of a memory device at a defined scan/read refresh frequency. For each management unit, the processing device identifies a page with the lowest sensing overhead criterion and senses data of that page without transferring it out of the memory device.

  • The processing device traverses management units of a memory device at a defined scan/read refresh frequency.
  • For each management unit, the processing device identifies a page with the lowest sensing overhead criterion.
  • The processing device senses data of the identified page without transferring it out of the memory device.

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      1. Potential Applications
  • Memory devices in electronic devices such as smartphones, laptops, and tablets.
  • Data centers and servers where efficient memory management is crucial.
      1. Problems Solved
  • Reducing the sensing overhead in memory devices.
  • Improving the efficiency of memory management.
      1. Benefits
  • Increased performance and efficiency in memory operations.
  • Lower power consumption due to reduced data transfers.
  • Extended lifespan of memory devices due to optimized sensing operations.


Original Abstract Submitted

A processing device in a memory sub-system traverses a plurality of management units of a memory device at a defined scan/read refresh frequency. For every management unit of the plurality of management units, the processing device identifies a page satisfying a lowest sensing overhead criterion, and senses data of the identified page without transferring the data out of the memory device. A non-transitory computer readable medium includes program instructions that when executed by a processing device, cause the processing device to perform operations of traversing a plurality of management units of a memory device at a defined scan/read refresh frequency. For every management unit, the processing device identifies a page satisfying a lowest sensing overhead criterion, and senses data of the identified page without transferring the data out of the memory device.