18172975. WAFER LEVEL PACKAGING PROCESS FOR THIN FILM INDUCTORS simplified abstract (QUALCOMM Incorporated)
Contents
WAFER LEVEL PACKAGING PROCESS FOR THIN FILM INDUCTORS
Organization Name
Inventor(s)
Anshih Tseng of Fremont CA (US)
WAFER LEVEL PACKAGING PROCESS FOR THIN FILM INDUCTORS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18172975 titled 'WAFER LEVEL PACKAGING PROCESS FOR THIN FILM INDUCTORS
Simplified Explanation
The abstract describes a method of forming an integrated circuit (IC) package, involving the following steps:
- Forming a thin-film inductor (TFI) over a first dummy carrier wafer
- Attaching an IC die to and over the TFI
- Attaching a second dummy carrier wafer to and over the IC die
- Removing the first dummy carrier wafer from the TFI
- Attaching at least one solder bump to and under the TFI
- Removing the second dummy carrier wafer from the IC die
Potential Applications:
- Semiconductor industry for IC packaging
- Electronics manufacturing for compact and efficient circuit integration
Problems Solved:
- Facilitates the formation of IC packages with thin-film inductors
- Enables the attachment of solder bumps for electrical connections
Benefits:
- Improved efficiency in IC packaging
- Enhanced circuit performance with integrated thin-film inductors
Original Abstract Submitted
An aspect relates to a method of forming an integrated circuit (IC) package, including: forming a thin-film inductor (TFI) over a first dummy carrier wafer; attaching an integrated circuit (IC) die to and over the TFI; attaching a second dummy carrier wafer to and over the IC die; removing the first dummy carrier wafer from the TFI; attaching at least one solder bump to and under the TFI; and removing the second dummy carrier wafer from the IC die. Another aspect relates to a method of forming an IC package, including forming a first redistribution layer (RDL) over a through-silicon via (TSV); forming a second RDL under the TSV; forming a thin-film inductor (TFI) over the first RDL; and attaching at least one integrated circuit (IC) die to the second RDL or the TFI.