18168899. SEMICONDUCTOR STRUCTURE, PREPARATION METHOD THEREFOR AND MEMORY simplified abstract (CHANGXIN MEMORY TECHNOLOGIES, INC.)
Contents
SEMICONDUCTOR STRUCTURE, PREPARATION METHOD THEREFOR AND MEMORY
Organization Name
CHANGXIN MEMORY TECHNOLOGIES, INC.
Inventor(s)
Zengyan Fan of Hefei City (CN)
SEMICONDUCTOR STRUCTURE, PREPARATION METHOD THEREFOR AND MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18168899 titled 'SEMICONDUCTOR STRUCTURE, PREPARATION METHOD THEREFOR AND MEMORY
Simplified Explanation
The patent application describes a method for preparing a semiconductor structure with multiple conductive pillars. Here is a simplified explanation of the method:
- Providing a wafer with multiple conductive pillars formed on it.
- Inverting the wafer and etching the back plane to expose each conductive pillar.
- Depositing an insulation layer and a filling layer on the back plane and conductive pillars.
- Polishing the filling layer and back ends of the conductive pillars until they are flush with the back plane.
---
- Potential Applications
This technology could be used in the manufacturing of memory devices, microprocessors, and other semiconductor components.
- Problems Solved
This method solves the problem of efficiently preparing semiconductor structures with multiple conductive pillars of varying lengths.
- Benefits
The benefits of this technology include improved performance and reliability of semiconductor devices, as well as potentially reducing manufacturing costs.
- Potential Commercial Applications
This technology could be applied in the production of advanced memory chips, processors for electronic devices, and other semiconductor products.
- Possible Prior Art
Prior methods for preparing semiconductor structures with multiple conductive pillars may not have addressed the issue of different pillar lengths and achieving a flush back end with the filling layer.
---
- Unanswered Questions
- How does this method compare to traditional semiconductor structure preparation techniques?
This article does not provide a direct comparison to traditional methods, leaving the reader to wonder about the efficiency and effectiveness of this new approach.
- What are the specific materials used in the insulation and filling layers?
The article does not detail the specific materials used in the insulation and filling layers, which could be important for understanding the properties of the resulting semiconductor structure.
Original Abstract Submitted
A semiconductor structure, a method for preparing the semiconductor structure and a memory are provided. The method includes: providing a wafer in which multiple conductive pillars are formed; inverting the wafer and performing etching on a back plane of the wafer to expose each conductive pillar from the back plane of the wafer, and lengths of the multiple conductive pillars exposed to the back plane are different; depositing an insulation layer on the back plane of the wafer and the conductive pillars, and depositing a filling layer on the insulation layer, the filling layer completely covering back ends of the multiple conductive pillars; and performing polishing on the filling layer and back ends of a part of the conductive pillars, until a back end of each conductive pillar is exposed and the back ends of the multiple conductive pillars are flush with a back plane of the filling layer.
