18049428. SEMICONDUCTOR PACKAGE INCLUDING UNDERFILL AND METHOD OF FORMING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR PACKAGE INCLUDING UNDERFILL AND METHOD OF FORMING THE SAME
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SEMICONDUCTOR PACKAGE INCLUDING UNDERFILL AND METHOD OF FORMING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18049428 titled 'SEMICONDUCTOR PACKAGE INCLUDING UNDERFILL AND METHOD OF FORMING THE SAME
Simplified Explanation
The patent application describes a semiconductor package that includes a first semiconductor chip on a lower structure. The package also includes a first underfill material between the chip and the lower structure, which has two portions - one adjacent to the center region of the chip and another adjacent to the edge region. The second portion of the underfill has a higher degree of cure than the first portion. Additionally, there are multiple inner connection terminals between the chip and the lower structure, which extend in the underfill material.
- The semiconductor package includes a first semiconductor chip and a lower structure.
- A first underfill material is used between the chip and the lower structure.
- The first underfill material has two portions - one near the center region of the chip and another near the edge region.
- The second portion of the underfill material has a higher degree of cure than the first portion.
- Multiple inner connection terminals are present between the chip and the lower structure.
- The inner connection terminals extend in the underfill material.
Potential Applications
- Semiconductor packaging industry
- Electronics manufacturing
Problems Solved
- Provides improved structural integrity and reliability to the semiconductor package.
- Helps to prevent delamination and cracking of the underfill material.
- Enhances the overall performance and lifespan of the semiconductor package.
Benefits
- Increased durability and reliability of the semiconductor package.
- Reduced risk of damage or failure during operation.
- Improved thermal and electrical conductivity within the package.
Original Abstract Submitted
A semiconductor package includes a first semiconductor chip on a lower structure. A first underfill is between the first semiconductor chip and the lower structure. The first underfill includes a first portion adjacent to a center region of the first semiconductor chip, and a second portion adjacent to an edge region of the first semiconductor chip. The second portion has a higher degree of cure than the first portion. A plurality of inner connection terminals is between the first semiconductor chip and the lower structure. The plurality of inner connection terminals extends in the first underfill.
