17940915. Redundant Computations using Integrated Circuit Devices having Analog Inference Capability simplified abstract (Micron Technology, Inc.)
Contents
- 1 Redundant Computations using Integrated Circuit Devices having Analog Inference Capability
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Redundant Computations using Integrated Circuit Devices having Analog Inference Capability - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Unanswered Questions
- 1.10 Original Abstract Submitted
Redundant Computations using Integrated Circuit Devices having Analog Inference Capability
Organization Name
Inventor(s)
Redundant Computations using Integrated Circuit Devices having Analog Inference Capability - A simplified explanation of the abstract
This abstract first appeared for US patent application 17940915 titled 'Redundant Computations using Integrated Circuit Devices having Analog Inference Capability
Simplified Explanation
The patent application describes a device with redundant computations to improve the reliability of using memory cells for multiplication and accumulation operations.
- Memory cell array with programmable threshold voltages for multiplication and accumulation operations
- Redundant regions in the memory cell array for parallel operations
- Logic circuit to compare results from redundant operations and select an output result
Potential Applications
This technology could be applied in:
- High-performance computing
- Signal processing
- Artificial intelligence
Problems Solved
This technology addresses issues such as:
- Error-prone multiplication and accumulation operations
- Reliability concerns in memory cell-based computations
Benefits
The benefits of this technology include:
- Improved reliability in multiplication and accumulation operations
- Enhanced performance in parallel computing tasks
- Increased efficiency in memory cell usage
Potential Commercial Applications
Optimizing Memory Cell-Based Computations for Improved Reliability
Unanswered Questions
How does this technology compare to traditional multiplication and accumulation methods in terms of speed and accuracy?
The patent application does not provide a direct comparison between this technology and traditional methods.
What are the potential limitations or drawbacks of implementing this technology in practical applications?
The patent application does not discuss any potential limitations or drawbacks of using this technology.
Original Abstract Submitted
A device configured with redundant computations to improve reliability of using memory cells to perform operations of multiplication and accumulation. The device can have a memory cell array and a logic circuit. Each respective memory cell in the memory cell array has a threshold voltage programmable in a first mode to perform operations of multiplication and accumulation and programmable in a second mode, different from the first mode, to store data. The memory cell array has a plurality of regions operable in parallel to perform redundant operations of multiplication and accumulation. The logic circuit is configured to compare a plurality of results, generated from the redundant operations of multiplication and accumulation performed using the plurality of regions respectively, to select an output result from the plurality of results.
