17930117. LOGICAL TO PHYSICAL (L2P) ADDRESS MAPPING WITH FAST L2P TABLE LOAD TIMES simplified abstract (Micron Technology, Inc.)
Contents
LOGICAL TO PHYSICAL (L2P) ADDRESS MAPPING WITH FAST L2P TABLE LOAD TIMES
Organization Name
Inventor(s)
Steven R. Narum of Meridian ID (US)
Huapeng Guan of Redwood City CA (US)
LOGICAL TO PHYSICAL (L2P) ADDRESS MAPPING WITH FAST L2P TABLE LOAD TIMES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17930117 titled 'LOGICAL TO PHYSICAL (L2P) ADDRESS MAPPING WITH FAST L2P TABLE LOAD TIMES
Simplified Explanation
The abstract describes a memory device that detects memory operations updating entries in a level two volatile (L2V) table, which maps logical block addresses (LBA) to user data physical addresses in non-volatile memory. When a memory operation invalidates a mapping in an L2V entry, the memory device stores an indication of the affected LBA region in a volatile memory log. Once a transfer condition is met, the memory device copies the relevant L2V entries from volatile to non-volatile memory.
- Memory device detects memory operations updating L2V table entries
- L2V table maps LBAs to user data physical addresses
- Memory device stores indication of affected LBA region in volatile memory log
- Copying of L2V entries from volatile to non-volatile memory occurs upon satisfaction of transfer condition
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- Potential Applications
- Data storage systems
- Memory management in computing devices
- Problems Solved
- Efficiently updating and transferring memory mappings
- Ensuring data integrity in memory operations
- Benefits
- Improved performance in memory operations
- Enhanced reliability of memory mappings
- Efficient utilization of memory resources
Original Abstract Submitted
A memory device may detect a memory operation that updates a level two volatile (L2V) entry stored in an L2V table. Each L2V entry in the L2V table may indicate a mapping between a respective logical block address (LBA) and a respective user data physical address in non-volatile memory. The memory operation may cause a mapping between an LBA indicated in the L2V entry and a user data physical address indicated in the L2V entry to become invalid. The memory device may store, in a volatile memory log, an indication of an LBA region that includes the LBA. The memory device may detect that an L2 transfer condition, associated with the volatile memory log, is satisfied. The memory device may copy, from volatile memory to non-volatile memory, every L2V entry that indicates an LBA included in the LBA region based on detecting that the L2 transfer condition is satisfied.
