17898725. BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON simplified abstract (Micron Technology, Inc.)

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BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON

Organization Name

Micron Technology, Inc.

Inventor(s)

Guang Hu of Mountain View CA (US)

BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON - A simplified explanation of the abstract

This abstract first appeared for US patent application 17898725 titled 'BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON

Simplified Explanation

The method described in the abstract involves selecting a block from a set of blocks, performing scans using different read level offsets to determine bit error metric values, and selecting an optimal bin based on these values.

  • In response to a power on event, a block is selected from a set of blocks.
  • A first scan is performed using a set of read level offsets to select a first bin in accordance with a scan order.
  • If the first bin is not an initial bin of the scan order, a second scan is performed using a second read level offset assigned to a second bin.
  • The second bin immediately precedes the first bin in the scan order.
  • An optimal bin is selected based on the first and second bit error metric values.

Potential applications of this technology:

  • Data storage systems
  • Error correction in memory devices
  • Signal processing applications

Problems solved by this technology:

  • Improving error correction in data storage systems
  • Enhancing reliability of memory devices
  • Optimizing signal processing efficiency

Benefits of this technology:

  • Increased data integrity
  • Enhanced performance of memory devices
  • Improved accuracy in signal processing applications


Original Abstract Submitted

A method includes, in response to detecting a power on event, selecting a block from a set of blocks, causing a first scan to be performed using a set of read level offsets to select, from a set of bins in accordance with a scan order, a first bin assigned with a first read level offset resulting in a first bit error metric value, in response to determining that the first bin is not an initial bin of the scan order, causing, using a second read level offset assigned to a second bin, a second scan to be performed to obtain a second bit error metric value, wherein the second bin immediately precedes the first bin in the scan order, and selecting, based on first bit error metric value and the second bit error metric value, an optimal bin from the set of bins.