17897460. Memory Circuitry And Method Used In Forming Memory Circuitry simplified abstract (Micron Technology, Inc.)

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Memory Circuitry And Method Used In Forming Memory Circuitry

Organization Name

Micron Technology, Inc.

Inventor(s)

John D. Hopkins of Meridian ID (US)

Alyssa N. Scarbrough of Boise ID (US)

Memory Circuitry And Method Used In Forming Memory Circuitry - A simplified explanation of the abstract

This abstract first appeared for US patent application 17897460 titled 'Memory Circuitry And Method Used In Forming Memory Circuitry

Simplified Explanation

- Memory circuitry with strings of memory cells - Stack with insulative tiers and conductive tiers - Memory-array region with channel-material strings of memory cells - Stair-step region with cavity and multiple different-depth treads - Conducting material in the treads of the stairs - Methods disclosed for the memory circuitry

Potential Applications

- High-density memory storage - Improved memory circuitry design - Enhanced data processing capabilities

Problems Solved

- Efficient use of space in memory circuitry - Better organization of memory cells - Increased memory storage capacity

Benefits

- Higher memory storage density - Improved memory circuitry performance - Enhanced data processing speed


Original Abstract Submitted

Memory circuitry comprising strings of memory cells comprises a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers in a memory-array region. The insulative tiers and the conductive tiers extend from the memory-array region into a stair-step region. The stair-step region comprises a cavity comprising a flight of stairs extending along a first direction. Multiple different-depth and height-sequential treads in individual of the stairs extend along a second direction that is orthogonal to the first direction. Individual of the multiple different-depth treads comprise conducting material of one of the conductive tiers. The cavity comprises a pair of laterally-opposing outermost sidewalls relative to the second direction and that individually extend along the first direction. The multiple different-depth and height-sequential treads in the individual stairs comprise a single flight of said treads that extends along the second direction from one of the laterally-opposing outermost sidewalls to the other of the laterally-opposing outermost sidewalls. Methods are disclosed.