17894528. ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
Contents
ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES
Organization Name
Inventor(s)
Li-Te Chang of San Jose CA (US)
Yu-Chung Lien of San Jose CA (US)
Murong Lang of San Jose CA (US)
Zhenming Zhou of San Jose CA (US)
Michael G. Miller of Boise ID (US)
ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17894528 titled 'ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES
Simplified Explanation
The abstract describes a method for performing memory access operations by adjusting threshold voltage values based on data state metrics.
- Receiving a request to perform a memory access operation on a set of memory cells connected to a wordline.
- Identifying a block family associated with the memory cells.
- Determining default threshold voltage offset values for different logical programming levels.
- Calculating a data state metric for the memory cells.
- Adjusting threshold voltage values based on the data state metric.
- Performing the memory access operation by applying the adjusted threshold voltage values.
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- Potential Applications
- Memory devices
- Data storage systems
- Semiconductor industry
- Problems Solved
- Improving memory access operations
- Enhancing data reliability
- Optimizing performance of memory devices
- Benefits
- Increased data integrity
- Improved memory access speed
- Enhanced overall performance of memory devices
Original Abstract Submitted
An example method of performing memory access operations comprises: receiving a request to perform a memory access operation with respect to a set of memory cells connected to a wordline of a memory device; identifying a block family associated with the set of memory cells; determining, for each logical programming level of a plurality of logical programming levels, a corresponding default block family error avoidance (BFEA) threshold voltage offset value associated with the block family; determining a value of a data state metric associated with the set of memory cells; responsive to determining that the value of the data state metric satisfies a threshold criterion, determining, for each logical programming level of a plurality of logical programming levels, a corresponding sub-BFEA threshold voltage offset value; and performing the memory access operation by applying, for each logical programming level of the plurality of logical programming levels, a combination of the default BFEA threshold voltage value, the sub-BFEA threshold voltage value, and a corresponding base voltage level.
