17894248. APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS simplified abstract (Micron Technology, Inc.)
APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS
Organization Name
Inventor(s)
Yoshihiko Kamata of Yokohama (JP)
APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17894248 titled 'APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS
Simplified Explanation
The abstract describes a memory system that applies different voltage levels to control gates of transistors in memory cells to program data states.
- Memory system includes a controller to apply voltage levels to control gates of transistors in memory cells.
- First voltage level is applied to control gate of transistor to indicate data state of memory cell.
- Retains first voltage level on control gate of transistor.
- Connects first source/drain of transistor to data line corresponding to memory cell.
- Applies second voltage level to second source/drain of transistor while retaining first voltage level on control gate.
- Applies programming pulse to control gate of memory cell while data line is connected to first source/drain of transistor.
Potential Applications
- Non-volatile memory systems
- Flash memory
- Solid-state drives
Problems Solved
- Efficient programming of data states in memory cells
- Reliable retention of data states
Benefits
- Faster data programming
- Improved data retention
- Enhanced memory system performance
Original Abstract Submitted
Memories might include a controller configured to cause the memory to apply a first voltage level indicative of a data state of a memory cell of an array of memory cells to a control gate of a transistor, retain the first voltage level on the control gate of the transistor, connect a first source/drain of the transistor to a data line corresponding to the memory cell while applying a second voltage level to a second source/drain of the transistor and while retaining the first voltage level on the control gate of the transistor, and apply a programming pulse to a control gate of the memory cell while the data line is connected to the first source/drain of the transistor.
