17894070. SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT simplified abstract (Micron Technology, Inc.)

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SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT

Organization Name

Micron Technology, Inc.

Inventor(s)

Ling Pan of Singapore (SG)

Hong Wan Ng of Singapore (SG)

Kelvin Tan Aik Boo of Singapore (SG)

Seng Kim Ye of Singapore (SG)

See Hiong Leow of Singapore (SG)

SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17894070 titled 'SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT

Simplified Explanation

The semiconductor device assembly described in the patent application includes a semiconductor die, a substrate carrying the die, and a printed circuit board (PCB) connected to the substrate. The PCB has a primary conductive layer on the first surface of the substrate, with a first solder mask layer attached to it. The substrate also has a secondary conductive layer on the second surface, with a second solder mask layer attached. An inner conductive layer is positioned between the primary and secondary layers, containing a bond pad at the end of an opening that extends from the first solder mask layer through the primary layer to the bond pad.

  • The semiconductor device assembly includes a semiconductor die, a substrate, and a PCB.
  • The PCB has a primary conductive layer and a first solder mask layer.
  • The substrate has a secondary conductive layer and a second solder mask layer.
  • An inner conductive layer with a bond pad is positioned between the primary and secondary layers.
  • By attaching a solder ball to the bond pad of the inner layer, standoff height is reduced.

Potential Applications

  • Semiconductor manufacturing
  • Electronics industry
  • PCB assembly

Problems Solved

  • Reducing standoff height in semiconductor device assembly
  • Improving connection reliability
  • Enhancing overall device performance

Benefits

  • Improved electrical connections
  • Enhanced device reliability
  • Increased manufacturing efficiency


Original Abstract Submitted

A semiconductor device assembly includes a semiconductor die, a substrate carrying the semiconductor die, and a printed circuit board (PCB) coupled to the substrate. The PCB includes a primary conductive layer including a first surface of the substrate and a first solder mask layer coupled to the first surface. The substrate also includes a secondary conductive layer including a second surface of the substrate and a second solder mask layer coupled to the second surface. The substrate further includes an inner conductive layer positioned between the primary layer and the secondary layer, where the inner layer includes a bond pad positioned at the end of an opening that extends from the first solder mask layer through the primary layer to the bond pad of the inner layer. By attaching a solder ball to the bond pad of the inner layer, standoff height is reduced.