17894043. PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN AN INTEGRATED DEVICE AND A METALLIZATION PORTION simplified abstract (QUALCOMM Incorporated)
Contents
PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN AN INTEGRATED DEVICE AND A METALLIZATION PORTION
Organization Name
Inventor(s)
Yanmei Song of San Diego CA (US)
William Stone of San Diego CA (US)
Jianwen Xu of San Diego CA (US)
Senthil Sivaswamy of San Diego CA (US)
John Holmes of Escondido CA (US)
Ryan Lane of San Diego CA (US)
PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN AN INTEGRATED DEVICE AND A METALLIZATION PORTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17894043 titled 'PACKAGE COMPRISING A CHIPLET LOCATED BETWEEN AN INTEGRATED DEVICE AND A METALLIZATION PORTION
Simplified Explanation
The patent application describes a package with a first metallization portion, a first integrated device connected to the metallization portion through pillar interconnects, and a first chiplet positioned between the integrated device and the metallization portion. The first chiplet is connected to the integrated device through inter pillar interconnects and may be either an active or passive chiplet.
- The package includes a first metallization portion.
- A first integrated device is connected to the metallization portion through pillar interconnects.
- A first chiplet is located between the integrated device and the metallization portion.
- The first chiplet is connected to the integrated device through inter pillar interconnects.
- The first chiplet can be an active chiplet or a passive chiplet.
Potential Applications
- Advanced semiconductor packaging technology
- Microelectronics industry
- Integrated circuit design
Problems Solved
- Improved connectivity between chiplets and integrated devices
- Enhanced performance and functionality of integrated circuits
- Efficient use of space in semiconductor packages
Benefits
- Increased speed and efficiency of electronic devices
- Higher level of integration in semiconductor packages
- Potential for smaller and more powerful electronic devices
Original Abstract Submitted
A package comprising a first metallization portion, a first integrated device coupled to the first metallization portion through a first plurality of pillar interconnects, and a first chiplet located between the first integrated device and the first metallization portion. The first chiplet is coupled to the first integrated device through a first plurality of inter pillar interconnects. The first chiplet may include an active chiplet. The first chiplet may include a passive chiplet.
