17893966. SEMICONDUCTOR MEMORIES INCLUDING EDGE MATS HAVING FOLDED DIGIT LINES simplified abstract (Micron Technology, Inc.)
Contents
SEMICONDUCTOR MEMORIES INCLUDING EDGE MATS HAVING FOLDED DIGIT LINES
Organization Name
Inventor(s)
Hirokazu Ato of Sagamihara (JP)
SEMICONDUCTOR MEMORIES INCLUDING EDGE MATS HAVING FOLDED DIGIT LINES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17893966 titled 'SEMICONDUCTOR MEMORIES INCLUDING EDGE MATS HAVING FOLDED DIGIT LINES
Simplified Explanation
- Explanation:**
The patent application describes apparatuses and methods that utilize folded digit lines to improve functionality.
- A first digit line portion extends in a first direction.
- A second digit line portion also extends in the first direction.
- A third digit line portion is positioned between the first and second digit line portions and extends in the first direction.
- A folded portion is connected to the first and second digit line portions, extending in a second direction and crossing over the third digit line portion.
- Potential Applications:**
- Flexible displays
- Electronic devices with compact designs
- Wearable technology
- Problems Solved:**
- Space constraints in electronic devices
- Improving signal transmission efficiency
- Enhancing flexibility of electronic components
- Benefits:**
- Increased functionality in compact devices
- Improved signal transmission
- Enhanced design flexibility
Original Abstract Submitted
Apparatuses and methods including folded digit lines are disclosed. An example apparatus includes a first digit line portion extending in a first direction, a second digit line portion extending in the first direction, and a third digit line portion between the first and second digit line portions and extending in the first direction. A folded portion is coupled to the first and second digit line portions, and extends in a second direction and traverses the third digit line portion.
