17887587. SYSTEM ON CHIP HAVING THREE-DIMENSIONAL CHIPLET STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SYSTEM ON CHIP simplified abstract (Samsung Electronics Co., Ltd.)
SYSTEM ON CHIP HAVING THREE-DIMENSIONAL CHIPLET STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SYSTEM ON CHIP
Organization Name
Inventor(s)
Kyoungmin Lee of Yongin-si (KR)
SYSTEM ON CHIP HAVING THREE-DIMENSIONAL CHIPLET STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SYSTEM ON CHIP - A simplified explanation of the abstract
This abstract first appeared for US patent application 17887587 titled 'SYSTEM ON CHIP HAVING THREE-DIMENSIONAL CHIPLET STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SYSTEM ON CHIP
Simplified Explanation
The patent application describes a system on chip (SoC) with a three-dimensional (3D) chiplet structure and an electronic device that includes this SoC. The electronic device consists of a printed circuit board, the SoC mounted on the board, and a memory device on the SoC. The SoC comprises an SoC package substrate, a first die with a logic circuit placed on the substrate, and a second die with a logic circuit placed on top of the first die.
- The SoC has a 3D chiplet structure, meaning that multiple dies are stacked on top of each other.
- The first die is placed on the SoC package substrate and contains a logic circuit.
- The second die is placed on top of the first die and also contains a logic circuit.
- The electronic device includes a printed circuit board, the SoC, and a memory device on the SoC.
- The memory device is integrated into the SoC and is connected to the logic circuits on the dies.
Potential applications of this technology:
- Mobile devices: The 3D chiplet structure allows for more compact and efficient SoCs, making them suitable for smartphones, tablets, and other portable devices.
- Data centers: The improved performance and density of the 3D chiplet structure can benefit data centers by enabling faster and more efficient processing.
- Internet of Things (IoT): The smaller form factor and increased functionality of the SoC can be advantageous for IoT devices, allowing for more advanced features in a compact design.
Problems solved by this technology:
- Space limitations: The 3D chiplet structure allows for stacking multiple dies, increasing the functionality without significantly increasing the size of the SoC.
- Performance improvement: The integration of multiple logic circuits on separate dies enables faster processing and improved overall performance.
- Power efficiency: The compact design and integration of the memory device on the SoC contribute to improved power efficiency.
Benefits of this technology:
- Compact design: The 3D chiplet structure allows for a smaller form factor, making it suitable for various electronic devices.
- Improved performance: The integration of multiple logic circuits and memory on the SoC leads to enhanced processing capabilities.
- Power efficiency: The technology enables better power management and energy efficiency in electronic devices.
Original Abstract Submitted
Provided are a system on chip (SoC) having a three-dimensional (3D) chiplet structure, and an electronic device including the SoC. The electronic device includes a printed circuit board, the SoC on the printed circuit board, and a memory device on the SoC, wherein the SoC includes an SoC package substrate, a first die arranged on the SoC package substrate, and having a logic circuit thereon, and a second die arranged on the first die, and having a logic circuit thereon.
