17887366. MEMORY SUB-SYSTEM TRANSFER QUEUE RETENTION simplified abstract (Micron Technology, Inc.)
Contents
MEMORY SUB-SYSTEM TRANSFER QUEUE RETENTION
Organization Name
Inventor(s)
Vinay Sandeep of Bangalore (IN)
Sanandan Sharma of Hyderabad (IN)
Amit Bhardwaj of Bangalore (IN)
Prashanth Reddy Enukonda of Hyderabad (IN)
MEMORY SUB-SYSTEM TRANSFER QUEUE RETENTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17887366 titled 'MEMORY SUB-SYSTEM TRANSFER QUEUE RETENTION
Simplified Explanation
The method described in the patent application involves issuing a program command to a logic unit (LUN) of a memory device, writing multiple commands to a transfer queue within the memory device, detecting a program failure for the LUN of the memory device, and keeping some of the multiple commands in the transfer queue.
- Program command issued to a logic unit (LUN) of a memory device
- Multiple commands written to a transfer queue within the memory device
- Detection of program failure for the LUN of the memory device
- Maintenance of some commands in the transfer queue
Potential Applications
- Memory devices
- Data storage systems
- Computer hardware
Problems Solved
- Program failures in memory devices
- Efficient command management
- Improved reliability of memory devices
Benefits
- Enhanced reliability of memory devices
- Efficient handling of program failures
- Improved performance of data storage systems
Original Abstract Submitted
A method includes issuing a program command to a logic unit (LUN) of a memory device, writing a plurality of commands to a transfer queue within the memory device, detecting a program failure for the LUN of the memory device, and maintaining a number of the plurality of commands in the transfer queue.
