17884484. THROUGH-SUBSTRATE CONNECTIONS FOR RECESSED SEMICONDUCTOR DIES simplified abstract (Micron Technology, Inc.)
Contents
THROUGH-SUBSTRATE CONNECTIONS FOR RECESSED SEMICONDUCTOR DIES
Organization Name
Inventor(s)
Thiagarajan Raman of Boise ID (US)
Kunal R. Parekh of Boise ID (US)
THROUGH-SUBSTRATE CONNECTIONS FOR RECESSED SEMICONDUCTOR DIES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17884484 titled 'THROUGH-SUBSTRATE CONNECTIONS FOR RECESSED SEMICONDUCTOR DIES
Simplified Explanation
- Explanation:**
The patent application describes a semiconductor device assembly with through-substrate connections for recessed semiconductor dies. It includes a substrate with cavities, connective elements on the side surfaces of the cavities, and semiconductor dies with connective elements on their edge surfaces, connected through the connective elements to electrically couple the dies.
- Potential Applications:**
- Semiconductor manufacturing industry - Electronic devices requiring compact and efficient semiconductor assemblies
- Problems Solved:**
- Providing through-substrate connections for recessed semiconductor dies - Ensuring electrical coupling between semiconductor dies in a compact assembly
- Benefits:**
- Improved electrical connectivity in semiconductor device assemblies - Space-saving design for electronic devices - Enhanced performance and reliability of semiconductor assemblies
Original Abstract Submitted
This document discloses techniques, apparatuses, and systems for providing a semiconductor device assembly with through-substrate connections for recessed semiconductor dies. A semiconductor device assembly is described that includes a substrate having a first cavity and a second cavity. A first connective element is located at a side surface of the first cavity and a second connective element is located at a side surface of the second cavity. The semiconductor device assembly include a first semiconductor die and a second semiconductor die implemented at the first cavity and the second cavity, respectively. The first semiconductor die includes a third connective element at an edge surface of the die. The second semiconductor die includes a fourth connective element at an edge surface of the die. The dies are implemented at the cavities and connected through the connective elements to electrically couple the first die to the second die.
