17884327. ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
Contents
ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
Organization Name
Inventor(s)
Jay Sarkar of San Jose CA (US)
Vamsi Pavan Rayaprolu of Santa Clara CA (US)
Ipsita Ghosh of New Garia (IN)
ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17884327 titled 'ADAPTIVE OPTIMIZATION OF ERROR-HANDLING FLOWS IN MEMORY DEVICES
Simplified Explanation
The patent application discloses a system and method involving a memory device and a processing device that applies a set of error-handling operations to data in a memory segment based on a trained machine learning model.
- The processing device applies a set of error-handling operations to data in a memory segment, based on a trained machine learning model.
- The trained machine learning model is developed using latency data from previously performed error-handling operations.
- The output of the machine learning model provides a reordered set of error-handling operations to be performed on the data in the memory segment, adjusting the order of operations as needed.
- Potential Applications
- Data storage systems
- Computer memory management
- Error detection and correction systems
- Problems Solved
- Optimizing error-handling operations in memory devices
- Improving efficiency and reliability of data processing
- Benefits
- Increased performance of memory devices
- Enhanced data integrity and reliability
- Efficient error-handling processes
Original Abstract Submitted
Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including applying an ordered set of error-handling operations to be performed on data residing in a segment of the memory device as an input to a trained machine learning model, wherein the trained machine learning model is based on latency data for previously-performed error-handling operations; and obtaining an output of the trained machine learning model, the output comprising a reordered set of error-handling operations to be performed on the data residing in the segment of the memory device, and wherein the reordered set adjusts an order of one or more error-handling operations of the ordered set of error-handling operations.
