17884076. ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES
Organization Name
Inventor(s)
Patrick R. Khayat of San Diego CA (US)
Vamsi Pavan Rayaprolu of Santa Clara CA (US)
ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17884076 titled 'ERROR-HANDLING MANAGEMENT DURING COPYBACK OPERATIONS IN MEMORY DEVICES
Simplified Explanation
The patent application describes a system and method involving a memory device and a processing device that work together to ensure data integrity in memory cells.
- Select a source set of memory cells
- Perform a data integrity check on the source set to obtain a data integrity metric value
- If the data integrity metric value meets a threshold criterion, perform a first error-handling operation on the data
- If the first operation fails to correct the data, perform a second error-handling operation
- If the second operation successfully corrects the data, copy the corrected data to a destination set of memory cells
Potential Applications
- Data storage systems
- Computer memory devices
- Data centers
Problems Solved
- Ensuring data integrity in memory cells
- Handling errors in stored data
- Improving reliability of memory devices
Benefits
- Enhanced data reliability
- Improved error handling capabilities
- Increased data integrity in memory storage
Original Abstract Submitted
Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising selecting a source set of memory cells of the memory device, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; responsive to determining that a data integrity metric value satisfies the threshold criterion, performing a first error-handling operation on the data stored on the source set of memory cells; responsive to determining that the first error-handling operation fails to correct the data, performing a second error-handling operation on the data; and responsive to determining that the second error-handling operation corrected the data, causing the memory device to copy the corrected data to a destination set of memory cells of the memory device.
