17874206. HYBRID SEMICONDUCTOR DEVICE ASSEMBLY INTERCONNECTION PILLARS AND ASSOCIATED METHODS simplified abstract (Micron Technology, Inc.)
HYBRID SEMICONDUCTOR DEVICE ASSEMBLY INTERCONNECTION PILLARS AND ASSOCIATED METHODS
Organization Name
Inventor(s)
Yeow Chon Ong of Singapore (SG)
HYBRID SEMICONDUCTOR DEVICE ASSEMBLY INTERCONNECTION PILLARS AND ASSOCIATED METHODS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17874206 titled 'HYBRID SEMICONDUCTOR DEVICE ASSEMBLY INTERCONNECTION PILLARS AND ASSOCIATED METHODS
Simplified Explanation
The semiconductor device assembly described in the patent application includes a first semiconductor die, a second semiconductor die, and an interconnection structure that directly electrically couples the two dies. The interconnection structure consists of an inner metallic pillar, an outer metallic shell, a continuous metallic bridging layer, and a dielectric liner. The outer metallic shell surrounds and is spaced from the inner metallic pillar, the continuous metallic bridging layer is connected to both the inner metallic pillar and the outer metallic shell, and the dielectric liner is positioned between the inner metallic pillar and the outer metallic shell. In some cases, the second semiconductor die may be excluded, and the interconnection structure would solely be coupled to the first semiconductor die.
- The patent describes a semiconductor device assembly with a unique interconnection structure that directly connects two semiconductor dies.
- The interconnection structure consists of an inner metallic pillar, an outer metallic shell, a continuous metallic bridging layer, and a dielectric liner.
- The outer metallic shell surrounds and is spaced from the inner metallic pillar, while the continuous metallic bridging layer connects both the inner metallic pillar and the outer metallic shell.
- The dielectric liner is positioned between the inner metallic pillar and the outer metallic shell.
- In some cases, the interconnection structure may be coupled to only one semiconductor die.
Potential applications of this technology:
- This semiconductor device assembly can be used in various electronic devices that require direct electrical coupling between semiconductor dies.
- It can be applied in microprocessors, memory chips, and other integrated circuits where efficient interconnection is crucial.
Problems solved by this technology:
- The interconnection structure provides a direct electrical coupling between semiconductor dies, eliminating the need for additional components or complex wiring.
- It ensures reliable and efficient signal transmission between the semiconductor dies, reducing the risk of data loss or performance degradation.
Benefits of this technology:
- The simplified interconnection structure reduces the complexity and cost of manufacturing semiconductor device assemblies.
- It improves the overall performance and reliability of electronic devices by enabling direct and efficient communication between semiconductor dies.
- The design allows for compact and space-saving semiconductor device assemblies, making it suitable for miniaturized electronic devices.
Original Abstract Submitted
In some embodiments, a semiconductor device assembly can include a first semiconductor die, a second semiconductor die, and an interconnection structure therebetween. The interconnection structure can directly electrically couple the first and the second semiconductor dies. The interconnection structure can include an inner metallic pillar, an outer metallic shell, a continuous metallic bridging layer, and a dielectric liner. The outer metallic shell can surround and be spaced from the inner metallic pillar, the continuous metallic bridging layer can be over and connected with the inner metallic pillar and the outer metallic shell, and the dielectric liner can be between the inner metallic pillar and the outer metallic shell. In some embodiments, the second semiconductor die can be excluded and the interconnection structure can solely be coupled to the first semiconductor die.
