17825076. NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
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NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME
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NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17825076 titled 'NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME
Simplified Explanation
The patent application describes a non-volatile memory device with multiple structures and layers for improved performance and functionality.
- The device includes a first structure with a substrate, peripheral circuit, insulation structure, bonding pads, and interconnect structure.
- The second structure is bonded to the first structure and includes an etch stop layer, source line layer, stacked gate layers, interlayer insulation layers, channel structures, insulation structure, bonding pads, and interconnect structure.
- The connection layer includes insulation structure, input/output via, and input/output pad.
- The interface between the second and third insulation structures is positioned at a vertical level within the conductive etch stop layer.
Potential applications of this technology:
- Non-volatile memory devices used in various electronic devices such as smartphones, tablets, and computers.
- Storage devices for data centers and cloud computing systems.
- Embedded memory in automotive electronics, IoT devices, and wearable technology.
Problems solved by this technology:
- Improved performance and functionality of non-volatile memory devices.
- Enhanced data storage and retrieval capabilities.
- Better integration with other electronic components.
Benefits of this technology:
- Higher memory density and capacity.
- Faster read and write speeds.
- Improved reliability and durability.
- Compatibility with existing manufacturing processes.
Original Abstract Submitted
Provided is a non-volatile memory device including a first structure including a first substrate; a peripheral circuit; a first insulation structure; a plurality of first bonding pads; and a first interconnect structure; a second structure, which includes a conductive etch stop layer; a common source line layer; a stacked structure including alternately stacked gate layers and interlayer insulation layers; a plurality of channel structures penetrating through a cell region of the stacked structure; a second insulation structure; a plurality of second bonding pads; and a second interconnect structure and bonded to the first structure; and a connection layer including a third insulation structure; an input/output via; and an input/output pad, wherein an interface between the second insulation structure and the third insulation structure is disposed at a vertical level between the top surface and the bottom surface of the conductive etch stop layer.
