17822895. MEMORY DEVICE OPERATIONS FOR UNALIGNED WRITE OPERATIONS simplified abstract (Micron Technology, Inc.)

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MEMORY DEVICE OPERATIONS FOR UNALIGNED WRITE OPERATIONS

Organization Name

Micron Technology, Inc.

Inventor(s)

Scheheresade Virani of Frisco TX (US)

MEMORY DEVICE OPERATIONS FOR UNALIGNED WRITE OPERATIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17822895 titled 'MEMORY DEVICE OPERATIONS FOR UNALIGNED WRITE OPERATIONS

Simplified Explanation

- Memory device operations for unaligned write operations are described in the patent application. - The memory device receives a write command from a host device indicating data with a first size and a first logical address. - A set of buffers is allocated for the write command. - The memory device determines a set of physical addresses associated with a second size, each associated with the first size. - Stored data from the set of physical addresses is merged to generate a data unit with the second size in one or more buffers. - The data unit is then written to memory indicated by the set of physical addresses.

Potential Applications

  • Data storage systems
  • Computer memory devices
  • Embedded systems

Problems Solved

  • Efficient handling of unaligned write operations
  • Optimizing memory usage
  • Improving data transfer speeds

Benefits

  • Increased efficiency in memory operations
  • Enhanced data processing capabilities
  • Improved overall system performance


Original Abstract Submitted

Implementations described herein relate to memory device operations for unaligned write operations. In some implementations, a memory device may receive, from a host device, a write command indicating data having a first size that corresponds to a first write unit and a first logical address. The memory device may allocate a set of buffers for the write command. The memory device may determine a set of physical addresses corresponding to a physical address that is associated with the second size, where the set of physical addresses are each associated with the first size. The memory device may merge stored data from the set of physical addresses to one or more buffers, from the set of buffers, that do not include the data to generate a data unit having the second size. The memory device may write the data unit to memory indicated by the set of physical addresses.