17822101. MICROELECTRONIC DEVICES WITH A TIERED STACK OF CONDUCTIVE, INSULATIVE, AND PARTIALLY-SACRIFICIAL STRUCTURES, AND RELATED SYSTEMS AND METHODS simplified abstract (Micron Technology, Inc.)

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MICROELECTRONIC DEVICES WITH A TIERED STACK OF CONDUCTIVE, INSULATIVE, AND PARTIALLY-SACRIFICIAL STRUCTURES, AND RELATED SYSTEMS AND METHODS

Organization Name

Micron Technology, Inc.

Inventor(s)

David H. Wells of Boise ID (US)

Justin D. Shepherdson of Meridian ID (US)

Swapnil A. Lengade of Boise ID (US)

Collin Howder of Boise ID (US)

Dheeraj Kumar of Boise ID (US)

Andrew L. Li of Boise ID (US)

MICROELECTRONIC DEVICES WITH A TIERED STACK OF CONDUCTIVE, INSULATIVE, AND PARTIALLY-SACRIFICIAL STRUCTURES, AND RELATED SYSTEMS AND METHODS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17822101 titled 'MICROELECTRONIC DEVICES WITH A TIERED STACK OF CONDUCTIVE, INSULATIVE, AND PARTIALLY-SACRIFICIAL STRUCTURES, AND RELATED SYSTEMS AND METHODS

Simplified Explanation

    • Explanation:**

- Microelectronic devices have a tiered stack structure with insulative, conductive, and non-conductive layers arranged in alternating tiers. - The conductive structures are spaced apart by non-conductive structures and insulative structures. - The composition of the non-conductive structures differs from the insulative structures. - The fabrication method involves forming a precursor stack with alternating insulative and non-conductive structures, removing some non-conductive structures to create voids, and filling the voids with conductive structures.

    • Potential Applications:**

- Microelectronic devices - Integrated circuits - Semiconductor devices

    • Problems Solved:**

- Efficient use of space in microelectronic devices - Improved performance and reliability of electronic systems - Enhanced functionality of integrated circuits

    • Benefits:**

- Increased density of components in microelectronic devices - Enhanced electrical conductivity - Improved thermal management - Greater design flexibility


Original Abstract Submitted

Microelectronic devices include a region with a tiered stack that includes insulative, conductive, and non-conductive structures arranged in tiers. The insulative structures vertically alternate with both the conductive and the non-conductive structures. Each of the conductive structures is vertically spaced from another of the conductive structures by at least one of the non-conductive structures and at least two of the insulative structures. A composition of the non-conductive structures differs from a composition of the insulative structures. In methods of fabrication, a precursor stack is formed to include the insulative structures vertically alternating with first and second non-conductive structures. In a region of the precursor stack, the first non-conductive structures are removed, forming voids between multi-structure tier groups. Conductive structures are formed in the voids. Electronic systems are also disclosed.