17821645. STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS simplified abstract (Micron Technology, Inc.)
Contents
STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS
Organization Name
Inventor(s)
Fatma Arzum Simsek-ege of Boise ID (US)
Mingdong Cui of Folsom CA (US)
Richard E. Fackenthal of Carmichael CA (US)
STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17821645 titled 'STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS
Simplified Explanation
- Explanation:**
The patent application describes methods, systems, and devices for word line multiplexing in three-dimensional memory arrays. The memory die includes circuitry for access line multiplexing in regions adjacent to or between staircase regions. Each word line in a stack of word lines has a first portion and a second portion of semiconductor material, along with a gate material to modulate conductivity between the two portions. Biasing of the gate material couples the word lines with the respective second portion of the semiconductor material, enabling various multiplexing techniques within and among multiple stacks of word lines.
- Potential Applications:**
- Three-dimensional memory arrays - Semiconductor memory devices - Multiplexing technologies in memory systems
- Problems Solved:**
- Efficient word line multiplexing in three-dimensional memory arrays - Improved access line multiplexing in memory devices - Enhanced performance and scalability of memory systems
- Benefits:**
- Increased memory density - Enhanced data access speed - Improved overall performance of memory arrays
Original Abstract Submitted
Methods, systems, and devices for structures for word line multiplexing in three-dimensional memory arrays are described. A memory die may include circuitry for access line multiplexing in regions adjacent to or between staircase regions. For example, a multiplexing region may include, for each word line of a stack of word lines, a respective first portion of a semiconductor material and a respective second portion of the semiconductor material, and may also include a gate material operable to modulate a conductivity between the first portions and the second portions. Each word line may be coupled with the respective first portion of the semiconductor material, such that biasing of the gate material may couple the word lines with the respective second portion of the semiconductor material. Such features may support various techniques for multiplexing associated with the stack of word lines, or among multiple stacks of word lines, or both.
