17819826. DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VERIFY OPERATION simplified abstract (Micron Technology, Inc.)
DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VERIFY OPERATION
Organization Name
Inventor(s)
Yu-Chung Lien of San Jose CA (US)
Zhenming Zhou of San Jose CA (US)
Tomer Tzvi Eliash of Sunnyvale CA (US)
DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VERIFY OPERATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17819826 titled 'DETECTING A MEMORY WRITE RELIABILITY RISK WITHOUT USING A WRITE VERIFY OPERATION
Simplified Explanation
- Memory device detects memory write reliability risk without using a write verify operation - Program operation includes a single program pulse without a program verify operation immediately after - Flag value set based on comparing transition time and transition time threshold during program operation - Mitigation operation selectively performed based on flag value set to first or second value
Potential Applications
This technology could be applied in various memory devices such as solid-state drives, embedded systems, and computer memory modules.
Problems Solved
- Detecting memory write reliability risks without the need for a write verify operation - Improving memory device performance and reliability by setting flag values based on transition times
Benefits
- Simplifies memory write reliability risk detection process - Reduces the need for additional verify operations, potentially increasing memory device efficiency - Allows for selective mitigation operations based on detected risks, improving overall system stability and performance
Original Abstract Submitted
Implementations described herein relate to detecting a memory write reliability risk without using a write verify operation. In some implementations, a memory device may perform a program operation that includes a single program pulse and that does not include a program verify operation immediately after the single program pulse. The memory device may set a flag value based on comparing a transition time and a transition time threshold. The transition time may be a time to transition from a first voltage to a second voltage during the program operation. The memory device may selectively perform a mitigation operation based on whether the flag value is set to a first value or a second value.
